FANUC Series 90-30 PLC. Installation and Hardware Manual (GFK-0356P)

(written to). This keyswitch feature will always be in effect, regardless of how the

next two configurable features are set.

Run/Stop (configurable): This feature was introduced in CPU firmware release 7.0.

It is, by default, disabled. It is not functional unless the R/S Switch: parameter on the

CPU configuration screen is set to Enabled. This feature, when enabled, lets you stop

the PLC by turning the key switch to OFF, or start the PLC running by turning the

key switch to ON (if there are no faults).

If the PLC has a non-fatal fault, turning the key switch from OFF to ON will

cause the RUN light on the power supply to flash for 5 seconds. If you again

turn the key switch OFF, then ON during the 5 seconds, the fault will clear and

the PLC will go into run mode (and the RUN light will stay ON).

If the PLC has a fatal fault, you will not be able to use the keyswitch to either

clear the fault or put the PLC into run mode. You will have to correct the cause

of the fault before being able to resume operation.

RAM Memory and Override Protection (configurable): This feature was

introduced in CPU firmware release 8.0. This feature is, by default, disabled. It is

not functional unless the Mem Protect: parameter on the CPU configuration screen is

set to Enabled. If this feature is enabled and the keyswitch is ON, (1) user RAM

memory cannot be changed (2) discrete points cannot be overridden, and (3) the

TOD clock cannot be changed with the Hand Held Programmer (however, the TOD

clock can still be changed using programming software).

Protect your keys. Each new 350 - 364 CPU is supplied with a pair of keys for the key

switch. If you use one or more of the key switch protection features described above, we

recommend you carefully guard your keys. If they are lost, misplaced, or stolen, you

may be locked out from working on your PLC, and unauthorized persons may have

access to it. Replacement keys can be purchased under part number 44A736756-G01.

This kit contains 3 sets of CPU keys. All 350 - 364 CPUs use the same key.

Of course, you can choose to not use any of the keyswitch protection features, in which

case you can leave the keyswitch set to the OFF position, and leave the two configurable

keyswitch features set at their default (disabled) settings. Then, you will not need to use

a key to access the PLC.

Sequential Event Recorder (SER) Instruction

This functional instruction (programmed in ladder logic) was introduced in CPU

firmware release 9.0 and is available in all of the 350 - 354 CPUs that have this firmware.

The purpose of the SER is to provide a dynamic troubleshooting and debugging tool. In

effect, it takes ”snapshots” of the on/off status of groups of discrete points that you

specify. You also specify how many of these snapshots to take, when and how often

they will be taken, and where in memory they will be stored. The stored snapshots can

be analyzed to see the time relationship of the bits sampled. Please see the Series 90-30

PLC CPU Instruction Set Reference Manual, GFK-0467K or later for details on using this

instruction. Some feature highlights:

An SER function block collects up to 32 contiguous or non-contiguous bits per

sample.

Each SER function block can capture up to 1024 samples.

If the SER is embedded in a periodic subroutine, sampling rate is determined by the

periodic subroutine execution rate.

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Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Only the trigger sample is time stamped. The trigger sample can be time-stamped in

BCD (maximum resolution of 1 s) or POSIX format (maximum resolution of 10ms).

The time stamp is only placed once at the trigger point. The SER does not support

more than one time stamp per recording.

The SER can be configured for pre-, mid-, or post-trigger modes.

Embedded Ethernet Interface (CPU364)

The CPU364 consists of a CPU and an Ethernet Interface combined in one module. This

module offers Ethernet capabilities formerly available only with the separate

IC693CMM321 Ethernet module. The CPU364 offers several advantages compared to

using a separate CPU and Ethernet module:

It only occupies one slot in the PLC baseplate compared to the two slots required by

separate CPU and Ethernet modules.

The IC693CMM321 Ethernet module requires an external transceiver. The CPU364

does not require one since it has this functionality built-in. To use this internal

transceiver, connect to the 10BASE-T port. However, if you choose, you may use an

external transceiver by connecting to the CPU364’s AAUI port, which bypasses the

internal transceiver (see Appendix L for GE Fanuc transceiver information).

Because they both reside in the CPU364 module, the CPU and Ethernet Interface

can communicate without using the PLC backplane. This give faster

communications speed compared to using separate CPU and Ethernet modules,

which have to use the slower path across the PLC backplane.

Beginning with Firmware Release 9.1, the Ethernet Global Data (EGD) and

configurable Name Resolution features were added to the CPU364. These features

are not supported by the IC693CMM321 Ethernet module. Logicmaster will not

include support for these features. They will only be supported in Control, Version

2.2 or later, and in all versions of VersaPro programming software. For details about

these features, please see publication GFK-1541A or later versions (when available),

TCP/IP Ethernet Communications for the Series 90 PLC User’s Manual.

GFK-0356P

Chapter 5 CPUs

5-17

Hardware Features of the 350 - 364 CPUs

CPU350 and CPU360 Hardware Features

These two modules look identical except for labeling.

These modules feature an LED light, labeled ”PS Port” that

indicates serial port activity through the serial connector on the

PLC power supply. Typically, this LED will flash while data is

being transferred through the port, and will stay off when the

port is inactive.

These modules also have the keyswitch, described earlier in this

chapter, that is standard on the 350 - 364 CPUs.

CPU Firmware Upgrade

The CPU firmware, which is stored in Flash memory, is loaded through the serial port

connector on the PLC Power Supply.

PORT

CPU 350

CPU 360

OFF

5-18

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

CPU351, CPU352, and CPU363 Hardware Features

These three modules are similar in features and functionality. The CPU351 and CPU352

look identical except for labeling. The CPU363 has the same features as the other two,

but the orientation of its Port 1 and Port 2 connectors is reversed from those of the

CPU351 and CPU352, and its LED indicator lights, key switch, and shield ground

connector are in different locations. (The shield ground connector is on the front panel

of the CPU363, labeled “FRAME,” but is located on the bottom of the CPU351 and

CPU352 modules.)

CPU 351

SNP

PORT

CPU 363

OFF

ON/RUN

OFF/

PORT 1

STOP

RS-232

PIN 1

PORT 1

PIN 1

RS-232

PORT 2

RS-485

PIN 1

PORT 2

RS-485

FRAME

Shield Ground

Connector

Figure 5-4. CPUs 351, 352, and 363

CPU Firmware Upgrade

The CPU firmware, which is stored in Flash memory, is loaded through the Port 1

connector on these modules’ faceplate using Loader software supplied with the

firmware upgrade kit. The IC693CBL316 cable can be used for this purpose (see Chapter

10 for data sheet on this cable).

Keyswitch

This is a standard CPU keyswitch, discussed earlier in this chapter.

Shield Ground Connection Tab

This tab is located on the bottom of the CPU351 and 352 modules and on the front of the

CPU363 module. It is used to make the module’s shield ground connection. A wire with

GFK-0356P

Chapter 5 CPUs

5-19

the applicable terminal ends is supplied with the module for this purpose. Please see the

section ”Module Shield Grounding” in Chapter 2 (“Installation”) for details.

Serial Ports

The 351, 352, and 363 CPUs have three serial ports. One is accessed through a connector

on the PLC power supply (standard serial port found on all Series 90-30 CPUs), and the

connectors for the other two are on the modules’ front panel, labeled Port 1 and Port 2.

The CPU351, 352, and 363 serial ports are configurable using the programming software

configurator function. Each port can also be configured using a COMM_REQ. For de-

tails about using these ports and about the COMM_REQ instruction, please see publica-

tion GFK-0582, Series 90 PLC Serial Communications User’s Manual.

Serial Port Front Panel Connectors

Port 1, the top port is RS-232 compatible. This port has a 6-pin RJ-11 connector. This

connector has female contacts and is similar to modular jacks commonly used for

telephones and modems. The IC693CBL316 can be used to access this port, provid-

ing a direct connection to an RS-232 device without the need for a converter. See

Chapter 10 for a data sheet on this cable.

Port 2, the bottom port is RS-485 compatible. Access to Port 2 is through a 15-pin D

connector that has female contacts.

Serial Port Status LEDs

The CPU351 and CPU352 have three LEDs that indicate the status of serial port activity

on the CPU.

The SNP LED on the CPU351 and CPU352 is called PS Port on the CPU363. This

refers to the port that uses the serial connector on the PLC’s power supply. This

LED flashes when data is being transferred through the port. It remains off when

the port is inactive.

The P1 LED will flash when data is being transferred through Port 1, the RS-232

port. It remains off when the port is inactive.

The P2 LED will flash when data is being transferred through Port 2, the RS-485

port. It remains off when the port is inactive.

Protocols Supported

Starting with Firmware Release 9.00, Break-Free SNP became the default protocol on the

three Serial Ports on these modules. See previous section “Break-Free SNP Protocol” for

details.

SNP Port (Through Power Supply Connector)

SNP slave.

SNP-X slave

Port 1 and Port 2 (Through Module’s Front Panel Connectors)

SNP master and slave

SNP-X master and slave

RTU slave (starting with Firmware Release 8.0)

Serial I/O - Limited functionality (write only) starting with Firmware Release 8.0,

will have full functionality (read and write) starting with Firmware Release 10.0.

5-20

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Used with autodialer feature to call a pager. To use this feature, configure protocol

as Custom. See GFK-0582, Series 90 PLC Serial Communications User’s Manual for

details.

Pin Assignments for CPU351, CPU352, and CPU363 Serial Ports 1 & 2

The following two tables describe the pin assignments for each of the two front panel

serial ports on the CPU351, CPU352, and CPU363.

Table 5-5. Port 1 (RS-232)

Signal

Number

Name

Description

CTS

Clear To Send

TXD

TransmitData

SignalGround

RXD

Receive Data

RTS

Request to Send

Table 5-6. Port 2 (RS-485)

Signal

Number

Name

Description

Shield

Cable Shield

No Connection

+5VDC

Logic Power *

RTS(A)

Differential Request to Send

SignalGround

CTS(B‘)

Differential Clear To Send

Resistor Termination

RD(A‘)

Differential Receive Data

RD(B‘)

Differential Receive Data

SD(A)

Differential Send Data

SD(B)

Differential Send Data

RTS(B’)

Differential Request To Send

CTS(A’)

Differential Clear To Send

* Note that Pin 5 provides Isolated +5 VDC power

(100 mA maximum) for powering external options.

GFK-0356P

Chapter 5 CPUs

5-21

CPU364 Hardware Features

This module has four LED indicator lights, an Ethernet Restart pushbutton, a standard

CPU keyswitch, three port connectors, and a shield ground connection tab (labeled

“FRAME”).

a47501

EOK

PORT

LAN

CPU 364

STAT

OFF

ETHERNET

RESTART

PORT 1

RS-232

PIN 1

AAUI

10BASE T

FRAME

LED Indicators

There are four LED Indicators. Three relate to the Ethernet interface: EOK, LAN, and

STAT. These can be ON, OFF, FLASHING slow, or FLASHING fast in several different

combinations. The full functionality of these LEDs is detailed in GFK-1541, TCP/IP

Ethernet Communications for the Series 90 PLC User’s Manual.

The fourth LED, PS PORT, is for the CPU’s serial port and is not related to the Ethernet

interface. This LED will flash while data is being transferred through the SNP serial port

connector on the PLC power supply, and will stay off when the port is inactive. (On

some early production 364 CPUs, this LED is labeled “SNP.”) All Series 90-30 CPUs have

this standard serial port.

Ethernet Restart Pushbutton

This pushbutton performs four functions: LED test, Restart, Restart and enter Software

Load state, and Restart and enter Maintenance state. These are detailed in GFK-1541,

TCP/IP Ethernet Communications for the Series 90 PLC User’s Manual.

Keyswitch

This is a standard CPU keyswitch, discussed earlier in this chapter.

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Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Front Panel Connectors

The full functionality of these ports is detailed in GFK-1541, TCP/IP Ethernet

Communications for the Series 90 PLC User’s Manual.

Port 1, RS-232 - This connector is used for two purposes: (1) To connect a terminal or

terminal emulator to access the Station Manager software on the Ethernet Interface.

(2) To connect to a Personal Computer that will be used to update the Ethernet

Interface firmware (the CPU firmware is updated separately through the connector

on the power supply). This RJ-11 connector has the same pinout as Port 1 of the

CPUs 351, 352, and 353, shown in Table 5-5. The IC693CBL316 cable can be used to

access this port. See Chapter 10 for a data sheet on this cable.

AAUI port - This 14-pin AAUI port connects via a user-supplied IEEE 802.3

transceiver cable to an external Ethernet-compatible transceiver such as the GE

Fanuc catalog number IC649AEA102 (for 10Base T) or IC649AEA103 (for 10Base 2).

See Appendix L for details on these transceivers.

10Base T port - This 8-pin, RJ-45 port provides a direct connection to a 10Base T

(twisted pair) Ethernet network without the need for an external transceiver.

Shield Ground Connection Tab

This tab is used to make the module’s shield ground connection. A wire with the

applicable terminal ends is supplied with the module for this purpose. Please see the

section “CPU363 and 364 Shield Grounding” in Chapter 2 (“Installation”) for details.

Firmware Upgrade

The CPU firmware, which is stored in Flash memory, is loaded through the serial

port connector on the PLC Power Supply using a personal computer that has been

equipped with the loader and CPU firmware software.

The Ethernet Interface firmware, stored in Flash memory, is loaded through the

module’s front panel Port 1 connector using a personal computer that has been

equipped with the loader and Ethernet firmware software. Cable IC693CBL316 is

required (see Chapter 10 for details on this cable).

GFK-0356P

Chapter 5 CPUs

5-23

CPU Data Sheets

This section provides data sheets describing each of the Series 90-30 CPU modules. For

information on the State Logic CPUs, see Chapter 9, “State Logic Products.”

CPU Model List

IC693CPU311

5-slot baseplate with embedded CPU, 1K Byte Register Memory

IC693CPU313

5-slot baseplate with embedded CPU, 2K Bytes Register Memory

IC693CPU323

10-slot baseplate with embedded CPU

IC693CPU331

CPU module, 10 MHz

IC693CPU340

CPU module, 20 MHz, 32K Bytes User Program Memory

IC693CPU341

CPU module, 20 MHz, 80K Bytes User Program Memory

IC693CPU350

CPU module, 25 MHz

IC693CPU351

CPU module, 25 MHz, with two extra serial ports

IC693CPU352

CPU module, 25 MHz, math coprocessor, two extra serial ports

IC693CPU360

CPU module, 25 MHz

IC693CPU363

CPU module, 25 Mhz, with two extra serial ports

IC693CPU364

CPU module, 25 Mhz, with Ethernet interface

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Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Catalog Number IC693CPU311

a44563

PROGRAMMABLE

CONTROLLER

ÎÎ

BASE 5-SLOT

WITH CPU

ÎÎ

CAUTION

SYSTEM

PROGRAM

PROM

USER PROGRAM

AND REGISTER

VALUES MAY BE

LOST IF POWER

SUPPLY IS

REMOVED FOR

LONGER THAN

i HOUR

POWER

SUPPLY

CPU Type

5-slot baseplate with embedded CPU

Total Baseplates per System

Load Required from PowerSupply

410 milliamps from +5 VDC supply

ProcessorSpeed

10MegaHertz

Processor Type

80188

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

Typical Scan Rate

18 milliseconds per 1K of logic (boolean contacts)

User ProgramMemory(maximum)

6K Bytes

Discrete Input Points - %I

160 (maximum - combined inputs + outputs)

Discrete Output Points - %Q

160 (maximum - combined outputs + inputs)

DiscreteGlobalMemory - %G

1280 bits

Internal Coils - %M

1024 bits

Output (Temporary) Coils - %T

256 bits

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

RegisterMemory - %R

512 words

Analog Inputs - %AI

64 words

Analog Outputs - %AQ

32 words

System Registers (for reference table viewing

16 words (%SR)

only; cannot be referenced in user logic program)

Timers/Counters

170

Shift Registers

yes

Built-in Serial Ports

1 (uses connector on PLC power supply). Supports SNP

slave and SNP-X slave protocols.

Communications

LAN - Supports multidrop. Also supports Ethernet, FIP,

Profibus, GBC, GCM, GCM+ option modules.

Override

Battery Backed Clock

Interrupts

Type of Memory Storage

RAM and optional EPROM or EEPROM

PCM/CCM Compatibility

GFK-0356P

Chapter 5 CPUs

5-25

Catalog Number IC693CPU313

a44563

PROGRAMMABLE

ÎÎ

CONTROLLER

BASE 5-SLOT

ÎÎ

WITH CPU

ÎÎ

CAUTION

SYSTEM

PROGRAM

PROM

USER PROGRAM

AND REGISTER

VALUES MAY BE

LOST IF POWER

SUPPLY IS

REMOVED FOR

LONGER THAN

i HOUR

POWER

SUPPLY

CPU Type

5-slot baseplate with embedded CPU

Total Baseplates per System

Load Required from PowerSupply

430 milliamps from +5 VDC supply

ProcessorSpeed

10MegaHertz

Processor Type

80188

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

Typical Scan Rate

0.6 milliseconds per 1K of logic (boolean contacts)

User ProgramMemory(maximum)

12K Bytes (6K bytes prior to release 7)

Discrete Input Points - %I

160 (maximum - combined inputs + outputs)

Discrete Output Points - %Q

160 (maximum - combined outputs + inputs)

DiscreteGlobalMemory - %G

1280 bits

Internal Coils - %M

1024 bits

Output (Temporary) Coils - %T

256 bits

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

RegisterMemory - %R

1024words

Analog Inputs - %AI

64 words

Analog Outputs - %AQ

32 words

System Registers (for reference table viewing

16 words (%SR)

only; cannot be referenced in user logic program)

Timers/Counters

170

Shift Registers

yes

Built-in Ports

1 (uses connector on PLC power supply). Supports SNP

slave and SNP-X slave protocols.

Communications

LAN - Supports multidrop. Also supports Ethernet, FIP,

Profibus, GBC, GCM, GCM+ option modules.

Override

Battery Backed Clock

Interrupts

Type of Memory Storage

RAM and optional EPROM or EEPROM

PCM/CCM Compatibility

5-26

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Catalog Number IC693CPU323

a45134

PROGRAMMABLE

CONTROLLER

BASE 10-SLOT

WITH CPU

CAUTION

SYSTEM

PROGRAM

PROM

USER PROGRAM

AND REGISTER

VALUES MAY BE

LOST IF POWER

SUPPLY IS

REMOVED FOR

LONGER THAN

1 HOUR.

POWER

SUPPLY

CPU Type

10-slot baseplate with embedded CPU

Total Baseplates per System

Load Required from PowerSupply

430 milliamps from +5 VDC supply

ProcessorSpeed

10MegaHertz

Processor Type

80188

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

Typical Scan Rate

0.6 milliseconds per 1K of logic (boolean contacts)

User ProgramMemory(maximum)

12K Bytes (6K bytes prior to release 7)

Discrete Input Points - %I

320 (maximum - combined inputs + outputs)

Discrete Output Points - %Q

320 (maximum - combined outputs + inputs)

DiscreteGlobalMemory - %G

1280 bits

Internal Coils - %M

1024 bits

Output (Temporary) Coils - %T

256 bits

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

RegisterMemory - %R

1024words

Analog Inputs - %AI

64 words

Analog Outputs - %AQ

32 words

System Registers (for reference table viewing

16 words (%SR)

only; cannot be referenced in user logic program)

Timers/Counters

340

Shift Registers

yes

Built-in Ports

1 (uses connector on PLC power supply). Supports SNP

slave and SNP-X slave protocols.

Communications

LAN - Supports multidrop. Also supports Ethernet, FIP,

Profibus, GBC, GCM, GCM+ option modules.

Override

Battery Backed Clock

Interrupts

Type of Memory Storage

RAM and optional EPROM or EEPROM

PCM/CCM Compatibility

GFK-0356P

Chapter 5 CPUs

5-27

Catalog Number IC693CPU331

CPU Type

Single slot CPU module

ÎÎÎÎÎÎ

CPU331

Total Baseplates per System

5 (1 CPU baseplate + 4 expansionand/orremote)

ÎÎÎÎÎÎ

Load Required from PowerSupply

350 milliamps from +5 VDC supply

ÎÎÎÎÎÎ

ProcessorSpeed

10MegaHertz

ÎÎÎÎÎÎ

Processor Type

80188

ÎÎÎÎÎÎ

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

ÎÎÎÎÎÎ

Typical Scan Rate

0.4 milliseconds per 1K of logic (boolean contacts)

ÎÎÎÎÎÎ

User ProgramMemory(maximum)

16K Bytes

ÎÎÎÎÎÎ

Discrete Input Points - %I

512

ÎÎÎÎÎÎ

Discrete Output Points - %Q

512

ÎÎÎÎÎÎ

DiscreteGlobalMemory - %G

1280 bits

ÎÎÎÎÎÎ

Internal Coils - %M

1024 bits

ÎÎÎÎÎÎ

Output (Temporary) Coils - %T

256 bits

ÎÎÎÎÎÎ

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

ÎÎÎÎÎÎ

RegisterMemory - %R

2048words

ÎÎÎÎÎÎ

Analog Inputs - %AI

128 words

ÎÎÎÎÎÎ

Analog Outputs - %AQ

64 words

ÎÎÎÎÎÎ

System Registers (for reference table

16 words (%SR)

viewing only; cannot be referenced in user

logic program)

Timers/Counters

680

Shift Registers

yes

Built-in Ports

1 (uses connector on PLC power supply). Supports

SNP/SNP-X slave protocols. Requires CMM module

forSNP/SNP-X master, CCM, or RTU slave support;

PCM module for RTU master support.

Communications

LAN - Supports multidrop. Also supports Ethernet,

FIP, Profibus, GBC, GCM, GCM+ option modules.

Override

yes

Battery Backed Clock

yes

Interrupts

Type of Memory Storage

RAM and optional EPROM or EEPROM

PCM/CCM Compatibility

yes

5-28

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Catalog Number IC693CPU340

CPU Type

Single slot CPU module

ÎÎÎÎÎÎ

CPU340

Total Baseplates per System

5 (1 CPU baseplate + 4 expansionand/orremote)

ÎÎÎÎÎÎ

Load Required from PowerSupply

490 milliamps from +5 VDC supply

ÎÎÎÎÎÎ

ProcessorSpeed

20MegaHertz

ÎÎÎÎÎÎ

Processor Type

80C188XL

ÎÎÎÎÎÎ

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

ÎÎÎÎÎÎ

Typical Scan Rate

0.3 milliseconds per 1K of logic (boolean contacts)

ÎÎÎÎÎÎ

User ProgramMemory(maximum)

32K Bytes

ÎÎÎÎÎÎ

Discrete Input Points - %I

512

ÎÎÎÎÎÎ

Discrete Output Points - %Q

512

ÎÎÎÎÎÎ

DiscreteGlobalMemory - %G

1280 bits

ÎÎÎÎÎÎ

Internal Coils - %M

1024 bits

ÎÎÎÎÎÎ

Output (Temporary) Coils - %T

256 bits

ÎÎÎÎÎÎ

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

ÎÎÎÎÎÎ

RegisterMemory - %R

9999words

ÎÎÎÎÎÎ

Analog Inputs - %AI

1024words

ÎÎÎÎÎÎ

Analog Outputs - %AQ

256 words

ÎÎÎÎÎÎ

System Registers (for reference table

16 words (%SR)

viewing only; cannot be referenced in user

logic program)

Timers/Counters

>2000

Shift Registers

yes

Built-in Ports

1 (uses connector on PLC power supply). Supports

SNP/SNP-X slave protocols. Requires CMM module

forSNP/SNP-X master, CCM, or RTU slave support;

PCM module for RTU master support.

Communications

LAN - Supports multidrop. Also supports Ethernet,

FIP, Profibus, GBC, GCM, GCM+ option modules.

Override

yes

Battery Backed Clock

yes

Interrupts

yes

Type of Memory Storage

RAM and optional Flash

PCM/CCM Compatibility

yes

GFK-0356P

Chapter 5 CPUs

5-29

Catalog Number IC693CPU341

CPU Type

Single slot CPU module

ÎÎÎÎÎÎ

CPU341

Total Baseplates per System

5 (1 CPU baseplate + 4 expansionand/orremote)

ÎÎÎÎÎÎ

Load Required from PowerSupply

490 milliamps from +5 VDC supply

ÎÎÎÎÎÎ

ProcessorSpeed

20MegaHertz

ÎÎÎÎÎÎ

Processor Type

80C188XL

ÎÎÎÎÎÎ

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

ÎÎÎÎÎÎ

Typical Scan Rate

0.3 milliseconds per 1K of logic (boolean contacts)

ÎÎÎÎÎÎ

User ProgramMemory(maximum)

80K Bytes

ÎÎÎÎÎÎ

Discrete Input Points - %I

512

ÎÎÎÎÎÎ

Discrete Output Points - %Q

512

ÎÎÎÎÎÎ

DiscreteGlobalMemory - %G

1280 bits

ÎÎÎÎÎÎ

Internal Coils - %M

1024 bits

ÎÎÎÎÎÎ

Output (Temporary) Coils - %T

256 bits

ÎÎÎÎÎÎ

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

ÎÎÎÎÎÎ

RegisterMemory - %R

9999words

ÎÎÎÎÎÎ

Analog Inputs - %AI

1024words

ÎÎÎÎÎÎ

Analog Outputs - %AQ

256 words

ÎÎÎÎÎÎ

System Registers (for reference table

16 words (%SR)

viewing only; cannot be referenced in user

logic program)

Timers/Counters

>2000

Shift Registers

yes

Built-in Ports

1 (uses connector on PLC power supply). Supports

SNP/SNP-X slave protocols. Requires CMM module

forSNP/SNP-X master, CCM, or RTU slave support;

PCM module for RTU master support.

Communications

LAN - Supports multidrop. Also supports Ethernet,

FIP, Profibus, GBC, GCM, GCM+ option modules.

Override

yes

Battery Backed Clock

yes

Interrupts

yes

Type of Memory Storage

RAM and optional EPROM or EEPROM for early

versions. Starting with hardware version

IC693CPU341-J and firmware Release 4.61, only

RAM and optional Flash are supported.

PCM/CCM Compatibility

yes

5-30

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Catalog Number IC693CPU350

CPU Type

Single slot CPU module

Total Baseplates per System

8 (CPU baseplate + 7 expansionand/orremote)

PORT

CPU 350

Load Required from PowerSupply

670 milliamps from +5 VDC supply

ProcessorSpeed

25MegaHertz

OFF

Processor Type

80386EX

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

Typical Scan Rate

.22 milliseconds per 1K of logic (boolean contacts)

User ProgramMemory(maximum)

32K Bytes (not configurable)

Discrete Input Points - %I

2,048

Discrete Output Points - %Q

2,048

DiscreteGlobalMemory - %G

1,280 bits

Internal Coils - %M

4,096 bits

Output (Temporary) Coils - %T

256 bits

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

RegisterMemory - %R

9,999words

Analog Inputs - %AI

2,048words

Analog Outputs - %AQ

512 words

System Registers (for reference table

28 words (%SR)

viewing only; cannot be referenced in user logic

program)

Timers/Counters

>2,000

Shift Registers

Yes

Built-in Serial Port

1 (uses connector on PLC power supply). Supports

SNP/SNP-X slave protocols. Requires CMM module

forSNP/SNP-X master, CCM, or RTU slave protocol

support; PCM module for RTU master support.

Communications

LAN - Supports multidrop. Also supports Ethernet,

FIP, Profibus, GBC, GCM, GCM+ option modules.

Override

Yes

Battery Backed Clock

Yes

Interrupts

Supports the periodic subroutine feature

Type of Memory Storage

RAM and Flash

PCM/CCM Compatibility

Yes

Floating PointMath Support

Yes. Firmware-based in firmware releases 9.0 and

later.

GFK-0356P

Chapter 5 CPUs

5-31

Catalog Number IC693CPU351

CPU Type

Single slot CPU module

Total Baseplates per System

8 (CPU baseplate + 7 expansionand/orremote)

CPU 351

SNP

Load Required from PowerSupply

890 milliamps from +5 VDC supply

ProcessorSpeed

25MegaHertz

Processor Type

80386EX

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

Typical Scan Rate

.22 milliseconds per 1K of logic (boolean contacts)

ON/RUN

User ProgramMemory(maximum)

Starting with firmware Release 9.0, 240K Bytes. Note: Actual

OFF/

size of available user program memory depends on the

STOP

amounts configured for the %R, %AI, and %AQ configurable

wordmemory types (see below).

For firmware prior to Release 9.0, fixed size is 80K bytes.

PORT 1

RS-232

Discrete Input Points - %I

2,048

Discrete Output Points - %Q

2,048

DiscreteGlobalMemory - %G

1,280 bits

Internal Coils - %M

4,096 bits

Output (Temporary) Coils - %T

256 bits

PORT 2

RS-485

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

RegisterMemory - %R

Starting with firmware Release 9.0, configurable in 128 word

increments from 128 to 16,384 word with Logicmaster and

from 128 to 32,640 words with Control version 2.2. For firm-

ware prior to Release 9.0, fixed size is 9,999 words.

Analog Inputs - %AI

Starting with firmware Release 9.0, configurable in 128 word

increments from 128 to 16,384 word with Logicmaster and

from 128 to 32,640 words with Control version 2.2. For firm-

ware prior to Release 9.0, fixed size is 9,999 words.

Analog Outputs - %AQ

Starting with firmware Release 9.0, configurable in 128 word

increments from 128 to 16,384 word with Logicmaster and

from 128 to 32,640 words with Control version 2.2. For firm-

ware prior to Release 9.0, fixed size is 9,999 words.

System Registers (for reference table view-

28 words (%SR)

ing only; cannot be referenced in logic program)

Timers/Counters

>2,000

Shift Registers

Yes

Built-in Serial Ports

Three ports. Supports SNP/SNPX slave (on power supply

connector) and RTUslave,SNP/SNPXmaster/slave,Serial

I/O (on Ports 1 and 2). Requires CMM module for CCM;

PCM module for RTU master support.

Communications

LAN - Supports multidrop. Also supports Ethernet, FIP, Pro-

fibus, GBC, GCM, GCM+ option modules.

Override

Yes

Battery Backed Clock

Yes

InterruptSupport

Supports the Periodic Subroutine feature.

Type of Memory Storage

RAM and Flash

PCM/CCM Compatibility

Yes

Floating PointMath Support

Yes, firmware-based in firmware Release 9.0 and later.

The CPU351 is supported by Logicmaster 90-30/20/Micro programming and configuration software Release

6.00 and later releases, and Control programming and configuration software Release 2.0 and later

releases.

5-32

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Catalog Number IC693CPU352

CPU Type

Single slot CPU module

Total Baseplates per System

8 (CPU baseplate + 7 expansionand/orremote)

CPU 352

SNP

Load Required from PowerSupply

890 milliamps from +5 VDC supply

ProcessorSpeed

25MegaHertz

Processor Type

80386EX

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

Typical Scan Rate

.22 milliseconds per 1K of logic (boolean contacts)

ON/RUN

User ProgramMemory(maximum)

Starting with firmware Release 9.0, 240K Bytes. Note: Actual

OFF/

size of available user program memory depends on the

STOP

amounts configured for the %R, %AI, and %AQ configurable

wordmemory types (see below).

For firmware prior to Release 9.0, fixed size is 80K bytes.

PORT 1

RS-232

Discrete Input Points - %I

2,048

Discrete Output Points - %Q

2,048

DiscreteGlobalMemory - %G

1,280 bits

Internal Coils - %M

4,096 bits

Output (Temporary) Coils - %T

256 bits

PORT 2

RS-485

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

RegisterMemory - %R

Starting with firmware Release 9.0, configurable in 128 word

increments from 128 to 16,384 word with Logicmaster and

from 128 to 32,640 words with Control version 2.2. For firm-

ware prior to Release 9.0, fixed size is 9,999 words.

Analog Inputs - %AI

Starting with firmware Release 9.0, configurable in 128 word

increments from 128 to 16,384 word with Logicmaster and

from 128 to 32,640 words with Control version 2.2. For firm-

ware prior to Release 9.0, fixed size is 9,999 words.

Analog Outputs - %AQ

Starting with firmware Release 9.0, configurable in 128 word

increments from 128 to 16,384 word with Logicmaster and

from 128 to 32,640 words with Control version 2.2. For firm-

ware prior to Release 9.0, fixed size is 9,999 words.

System Registers (for reference

28 words (%SR)

table viewing only; cannot be refer-

enced in logic program)

Timers/Counters

>2,000

Shift Registers

Yes

Built-in Serial Ports

Three ports. Supports SNP/SNPX slave (on power supply

connector) and RTUslave,SNP/SNPXmaster/slave,Serial

I/O (on Ports 1 and 2). Requires CMM module for CCM;

PCM module for RTU master support.

Communications

LAN - Supports multidrop. Also supports Ethernet, FIP, Pro-

fibus, GBC, GCM, GCM+ option modules.

Override

Yes

Battery Backed Clock

Yes

InterruptSupport

Supports the Periodic Subroutine feature.

Type of Memory Storage

RAM and Flash

PCM/CCM Compatibility

Yes

Floating PointMath Support

Yes, hardware-based (built-in math co-processor)

The CPU352 is supported by Logicmaster 90-30/20/Micro programming and configuration software Release

7.00 and later releases, and Control programming and configuration software Release 2.0 and later

releases.

GFK-0356P

Chapter 5 CPUs

5-33

Catalog Number IC693CPU360

CPU Type

Single slot CPU module

Total Baseplates per System

8 (CPU baseplate + 7 expansionand/orremote)

PORT

CPU 360

Load Required from PowerSupply

670 milliamps from +5 VDC supply

ProcessorSpeed

25MegaHertz

OFF

Processor Type

80386EX

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

Typical Scan Rate

.22 milliseconds per 1K of logic (boolean contacts)

User ProgramMemory(maximum)

Starting with firmware Release 9.0, 240K Bytes. Note: Actual

size of available user program memory depends on the

amounts configured for the %R, %AI, and %AQ configurable

wordmemory types (see below). For firmware prior to Re-

lease 9.0, fixed size is 80K bytes.

Discrete Input Points - %I

2,048

Discrete Output Points - %Q

2,048

DiscreteGlobalMemory - %G

1,280 bits

Internal Coils - %M

4,096 bits

Output (Temporary) Coils - %T

256 bits

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

Starting with firmware Release 9.0, configurable in 128 word

increments from 128 to 16,384 words with Logicmaster and

from 128 to 32,640 words with Control version 2.2. For firm-

ware prior to Release 9.0, fixed size is 9,999 words.

Analog Inputs - %AI

Starting with firmware Release 9.0, configurable in 128 word

increments from 128 to 16,384 words with Logicmaster and

from 128 to 32,640 words with Control version 2.2. For firm-

ware prior to Release 9.0, fixed size is 9,999 words.

Analog Outputs - %AQ

Starting with firmware Release 9.0, configurable in 128 word

increments from 128 to 16,384 words with Logicmaster and

from 128 to 32,640 words with Control version 2.2. For firm-

ware prior to Release 9.0, fixed size is 9,999 words.

System Registers (for reference table

28 words (%SR)

viewing only; cannot be referenced in

logic program)

Timers/Counters

>2,000

Shift Registers

Yes

Built-in Serial Ports

1 (uses connector on PLC power supply). Supports SNP

slave and SNP-X slave protocols. Requires CMM module for

SNP/SNP-X master, CCM, or RTU slave protocol support;

PCM module for RTU master support.

Communications

LAN - Supports multidrop. Also supports Ethernet, FIP, Pro-

fibus, GBC, GCM, and GCM+ option modules.

Override

Yes

Battery Backed Clock

Yes

Interrupts

Yes

Type of Memory Storage

RAM and Flash

PCM/CCM Compatibility

Yes

Floating PointMath Support

Yes, firmware-based in firmware Release 9.0 and later.

5-34

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Catalog Number IC693CPU363

CPU Type

Single slot CPU module

Total Baseplates per System

8 (CPU baseplate + 7 expansionand/orremote)

a47500

Load Required from PowerSupply

890 milliamps from +5 VDC supply

ProcessorSpeed

25MegaHertz

PORT

Processor Type

80386EX

CPU 363

OperatingTemperature

0 to 60 degrees C (32 to 140 degrees F) ambient

Typical Scan Rate

.22 milliseconds per 1K of logic (boolean contacts)

OFF

UserMemory (total)

240K (245,760) Bytes. Actual size of available user program

memory depends on the amounts configured for %R, %AI,

and %AQ configurable word memory types (see below).

Discrete Input Points - %I

2,048

PORT 1

Discrete Output Points - %Q

2,048

RS-232

DiscreteGlobalMemory - %G

1,280 bits

Internal Coils - %M

4,096 bits

Output (Temporary) Coils - %T

256 bits

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

RegisterMemory - %R

Configurable in 128 word increments from 128 to 16,384

words with Logicmaster and from 128 to 32,640 words with

Control version 2.2.

Analog Inputs - %AI

Configurable in 128 word increments from 128 to 16,384

PORT 2

RS-485

words with Logicmaster and from 128 to 32,640 words with

Control version 2.2.

Analog Outputs - %AQ

Configurable in 128 word increments from 128 to 16,384

words with Logicmaster and from 128 to 32,640 words with

Control version 2.2.

System Registers (for reference table

28 words (%SR)

viewing only; cannot be referenced in user logic

FRAME

program)

Timers/Counters

>2,000

Shift Registers

Yes

Built-in Ports

Three ports. Supports SNP/SNPX slave (on power supply

connector). On Ports1and2, suportsSNP/SNPXmaster/

slave and RTU slave. Requires CMM module for CCM;

PCM module for RTU master support.

Communications

LAN - Supports multidrop. Also supports Ethernet, FIP, Pro-

fibus, GBC, GCM, GCM+ option modules.

Override

Yes

Battery Backed Clock

Yes

InterruptSupport

Supports the periodic subroutine feature.

Type of Memory Storage

RAM and Flash

PCM/CCM Compatibility

Yes

Floating Point Mat h Support

Yes, firmware-based in firmware Release 9.0 and later.

GFK-0356P

Chapter 5 CPUs

5-35

Catalog Number IC693CPU364

CPU Type

Single slot CPU module with embedded Ethernet Interface

Total Baseplates per System

8 (CPU baseplate + 7 expansionand/orremote)

a47501

Load Required from PowerSupply

1.51 Amps from +5 VDC supply

EOK

SNP

ProcessorSpeed

25MegaHertz

LAN

CPU 364

Processor Type

80386EX

STAT

Ethernet fuse, replaceable

2.69x2.69x6.1mm,125V, 1A, slow acting

OFF

Operating temperature

0 to 60 degrees C (32 to 140 degrees F) ambient

Typical Scan Rate

.22 milliseconds per 1K of logic (boolean contacts)

UserMemory (total)

240K Bytes. Note: Actual size of available user program

ETHERNET

RESTART

memory depends on the amounts configured for %R, %AI,

and %AQ configurable word memory types (see below).

PORT 1

Discrete Input Points - %I

2,048

RS-232

Discrete Output Points - %Q

2,048

DiscreteGlobalMemory - %G

1,280 bits

Internal Coils - %M

4,096 bits

Output (Temporary) Coils - %T

256 bits

AAUI

System Status References - %S

128 bits (%S, %SA, %SB, %SC - 32 bits each)

RegisterMemory - %R

Configurable in 128 word increments from 128 to 16,384

words with Logicmaster and from 128 to 32,640 words with

Control version 2.2.

Analog Inputs - %AI

Configurable in 128 word increments from 128 to 16,384

words with Logicmaster and from 128 to 32,640 words with

Control version 2.2.

10BASE T

Analog Outputs - %AQ

Configurable in 128 word increments from 128 to 16,384

words with Logicmaster and from 128 to 32,640 words with

Control version 2.2.

FRAME

System Registers (for reference table viewing

28 words (%SR)

only; cannot be referenced in logic program)

Timers/Counters

>2,000

Shift Registers

Yes

Built-in Serial Ports

1 (uses connector on PLC Power Supply). Supports SNP/

SNPX slave. Requires CMMmodule for SNP/SNP-X master,

RTU slave, or CCM; PCM module for RTU master support.

Communications

Ethernet (internal) - AAUI or 10BASE-T. AAUI requires

externaltransceiver. 10BASE-T is direct.

Ethernet (additional) - Supports Ethernet option modules.

LAN-Requires option modules for Genius, Profibus,FIP.

Override

Yes

Battery Backed Clock

Yes

InterruptSupport

Supports the periodic subroutine feature.

Type of Memory Storage

RAM and Flash

PCM/CCM Compatibility

Yes

Floating PointMath Support

Yes, firmware-based.

Note: On some early modules, the LED labeled “PS PORT” may say “SNP” instead; otherwise,

the modules are identical.

5-36

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Chapter

Memory Backup and Backup Battery

Backup Battery for RAM Memory (All Supplies)

The long-life Lithium battery (IC693ACC301) used to maintain the contents of the

CMOS RAM memory in the CPU is accessed by removing the cover plate located at the

bottom of the power supply faceplate. This battery is mounted on a plastic clip attached

to the inside of this cover.

The battery is wired to a small Berg female connector that connects to either of the two

Berg male connectors mounted on the Power Supply printed circuit board. This battery

can be replaced with power applied to the PLC.

a43833

PWR

Low Battery

RUN

BATT

Warning LED

BATTERY

CONNECTORS

ÎÎÎ

ÎÎ

ÎÎÎ

ÎÎ

ÎÎÎ

ÎÎ

ÎÎÎ

LITHIUM

ÎÎÎ

BACK-UP

BATTERY

Battery

ÎÎÎÎÎ

Cavity

ÎÎ

Battery Cover Removal Notch

Figure 6-1. Backup Battery for RAM Memory

Caution

If a Low Battery Warning (BATT LED turns ON) occurs, replace the

battery located in the power supplybefore removing power from the rack.

Otherwise, there is a possibility that data will be corrupted or the

application program will be cleared from memory.

6-1

GFK-0356P

Battery Replacement Instructions

Warning

To avoid the chance of losing the contents of RAM memory, you can

carefully perform the following steps with PLC power ON. This

procedure should only be performed by qualified electrical personnel

who are trained in applicable electrical safety rules and procedures.

Failure to follow standard electrical safety practice can result in injury

or death to personnel, damage to equipment, or both.

Carefully insert the tip a small pocket-size screwdriver approximately 1/4 inch (6

mm) into the battery cover removal slot, located beneath the battery cover (see

previous figure).

Gently rotate the screwdriver about 45 degrees to loosen the cover.

Remove cover with fingers. The battery is mounted in a clip on the back of the

cover. It has a pair of leads with a connector that is plugged-in to a connector on a

circuit board inside the power supply.

Carefully reach into battery cavity with your fingers (do not use a metal object to do

this) and unplug the battery connector.

Remove the old battery from the clip on the battery cover and set it aside. Be careful

not to mix it up with the new battery.

Carefully reach into battery cavity with your fingers (do not use a metal object to do

this) and plug in new battery connector.

Clip new battery into clip on battery cover.

Snap battery cover back onto power supply.

6-2

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

Battery Replacement/Memor y Protection Factors

Since there are differences in each PLC application, each user will have to determine on

an individual basis what strategy to use. There are several factors to consider when

planning a batteryreplacement/memory protection strategy:

How critical is the application? Will considerable loss be sustained if the PLC goes

down? If so, frequent replacement of the battery would be a wise choice. For critical

applications, the cost of a battery would be quite low in comparison to the cost of a

PLC shut-down.

How readily can a backup program be loaded? Are there technicians on-site who

know how to load a backup program? Is the backup program accessible at all times

to those responsible for maintaining the equipment? Is a personal computer or

equivalent equipped with GE Fanuc programming software available at all times for

use in loading the backup program?

Do you have a preventive maintenance program? A formal program would help

ensure that the battery is replaced on time. Some users replace the backup battery

each year during their annual shut-down period.

How accessible is the PLC? In some applications, the PLC may be mounted in a

remote location that is not easily accessed.

Safety codes. Some users may have safety rules that would not allow replacing the

battery with power applied.

How is the PLC used? Is power left on all the time, or is it shut down every day? See

the heading ”Factors Affecting Battery Life.”

Some users run without a backup battery by using one of the PROM options. See

the section below called ”Operating Without a Memory Backup Battery” to

determine if this strategy is suitable for your application.

The Importance of Backing up your Program

Experience has shown that regardless of what strategy you use to maintain PLC

memory, you should, additionally, always keep an up-to-date backup copy of your

application program. The effort required to create and maintain a backup copy is very

small compared to the work required to reprogram, or re-key from hardcopy, your entire

application if, due to some misfortune, it was lost. Other suggestions to help minimize

down time:

Make sure the backup copy is readily accessible to those who may need to use it.

Train more than one person to load the backup program in case that one person is

not available when needed. Information on creating a backup can be found in GE

Fanuc ’s software user ’s manuals. This procedure is also covered in applicable GE

Fanuc programming software training courses.

Ensure that a suitable computer (usually a laptop type) is equipped with GE Fanuc

PLC programming software and will be readily available to load the backup

program to the PLC.

Create a written backup procedure. Fortunately, restoring your program from the

backup copy is probably not something you will do very often. As a result, however,

some of the steps could easily be forgotten.

GFK-0356P

Chapter 6 Memory Backup and Backup Battery

6-3

Factors Affecting Battery Life

Replacing your battery once per year is a good rule of thumb. However, no one can

predict precisely how long a backup battery will last because this depends upon what

CPU is used, what temperature it is subjected to, and how it used. Considering the

following list of factors that affect battery life will help you decide how frequently to

replace the battery in your application:

A battery that is not in use has an estimated life (called its ”shelf life”) of 5 years at

”room temperature” (25 degrees C, or 77 degrees F).

A battery that is used continuously (supplying current to memory circuits with PLC

power off) has an average estimated life of one year for CPU models 331 and above,

and 2 years for CPU models 311, 313 and 323, if used at room temperature.

As long as a PLC is powered up, its battery is not being used; so how often you

power down your PLC has a direct affect on battery life. Some users keep their PLC

powered up all of the time while others turn theirs off every night.

Temperature has a relatively large affect on battery life. Temperatures considerably

above room temperature (25 degrees C, or 77 degrees F), or below freezing (0

degrees C, or 32 degrees F) will appreciably shorten battery life.

The type of CPU has a small affect on battery life. Some CPUs have more memory

than others. Also, some CPUs have a clock and some do not. More memory

requires more battery current to maintain its contents; and a clock requires battery

current to maintain its operation.

Low Battery Warning Methods

There are three basic ways that the PLC warns of a low battery:

The red ”BATT” LED on the Power Supply module lights when the battery is low.

The disadvantage of this method is that the PLC is often mounted in an enclosure,

so this LED might not be easily seen.

The PLC Fault Table is updated with a battery low message. Viewing the PLC Fault

Table requires that a programmer be connected to the PLC.

Certain System Reference bits are set to logic 1 when the battery is low. These are

%SA011 (LOW_BAT), %SC009 (ANY_FLT), %S010 (SY_FLT), and %SC012

(SY_PRES). The most specific is %SA011 (LOW_BAT). This bit could be used as a

contact in your ladder logic program to turn on an output that controls a warning

light on an operator panel (as in the example rung below), or to send a warning to

an operator interface terminal.

%SA011

%Qxxx

In the rung shown above, the %SA011 contact will close when a low battery is detected

by the PLC. This will turn on the %Q output coil, which addresses an output module’s

output that will turn on a warning light. An alternate method would be to

communicate the status of the coil (which, in that case, would probably be a %M coil) to

a Human to Machine Interface (HMI) terminal such as a GE Fanuc CIMPLICITY HMI

unit. The HMI could be programmed to display a warning message when that

6-4

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

particular bit goes to a logic 1. For more information about System Reference bits and

ladder logic programming, see the the Series 90-30/20/Micro PLC CPU Instruction Set

Reference Manual, GFK-0467.

Operating Without a Memory Backup Battery

Whether it would be to your advantage to use a battery-less scheme depends on your

application. There are various advantages and disadvantages to consider in making

your decision.

Possible Advantage

The obvious advantage of operating without a memory backup battery is that you are

freed from the need to maintain the battery. To be able to run without a battery, you

need to have a PROM device - either an EPROM, EEPROM, or Flash PROM - installed

in your system. These devices can store program logic, configuration, and register

values without the need for a backup battery, and you can configure your CPU to read

the contents of PROM into RAM memory each time the PLC is powered up.

Possible Disadvantages

Information is not stored to your PROM device automatically. To store information, you

must stop the PLC, then use a programming device to tell the CPU to write the current

PLC (RAM) memory contents to the PROM device. This requirement may make

battery-less operation undesirable for many users. For example, in many applications,

important data is gathered and stored in RAM register memory, data such as the current

level of material in a tank that is being filled, or a running count of parts produced, etc.

This constantly changing data is not being copied automatically to the PROM device. It

only exists in RAM memory. Therefore, if power is lost and there is no RAM memory

backup battery, this data will be lost.

However, one way to preserve data in a battery-less system is to send it over a network

to a computer that can store the data on its hard drive. Also, static data (data that

doesn’t change) contained in RAM memory, such as mathematical constants or look-up

table type information, can be stored initially in PROM and automatically written back

to RAM each time the PLC powers up.

Another consideration is that if you change your program (or configuration), someone

will have to remember to write the changed information to the PROM device. If that

step is forgotten, then the change only exists in RAM memory, and in a battery-less

system, it will be lost the next time power is removed from the PLC.

Configuring a Battery-Less System

Here are the basic steps to configure a system to run battery-less:

Equip your CPU with a PROM device. On some CPUs a PROM device is purchased

as an option; on others, it is a standard feature. The CPU chapter of this manual has

a table that identifies the standard PROM configuration for each CPU.

There are three CPU configuration parameters involved. Configure them as

follows: Pwr Up Mode: RUN; Logic/Cfg: PROM; Registers: PROM.

Store your folder (include Program Logic, Configuration, and Register Data) to the

PLC. This places your entire folder into RAM (working) memory.

GFK-0356P

Chapter 6 Memory Backup and Backup Battery

6-5

Write PLC (RAM) memory to the PROM device. Make sure you write all data

(Program Logic, Configuration, and Register Data) to the PROM. Note that the type

of PROM device depends on what model CPU you have and how it is equipped.

If you are using a 340 or higher CPU (such as a CPU350, CPU351, etc.), read the next

section for an additional requirement.

When configured this way, the contents of PROM memory will be written into RAM

memory each time the PLC powers up.

Operation Without a Memory Backup Battery Using a 340 or Higher CPU

This information is applicable only to CPU model numbers 340 and higher (such as

CPU350, CPU351, etc.). In systems that do not use a memory backup battery, a standard

0.1” Berg jumper should be installed across either of the two power supply battery

connectors to ensure reliable restarting of the CPU after a power cycle. This jumper

should not be installed if a battery is plugged into either the power supply or CPU

battery connector.

Determining Battery Age Using Battery Date Code

Battery age can be determined from the date code stamped on the battery.

The battery, manufactured by Panasonic, will have a four-digit date code. It will be

something like 5615 or 7Y34. Use the following information to determine the date of

manufacture.

First digit shows the year in a rotating 10-year cycle. For example, 0=1990, 1=1991,

2=1992 ... 9=1999, 0=2000, 1=2001, 2=2002, etc. This seeming duplication should

not be a problem because the shelf life of these batteries is 5 years. Batteries in

inventory that are older than 4 years old should be discarded according to the

manufacturer ’s instructions (since they have less than one year of life remaining we

would not recommend using them in a PLC). This will ensure that outdated

batteries are not mistaken for newer batteries.

Second digit shows the month. 1=January, 2=February, 3=March, 4=April, 5=May,

6=June,

7=July, 8=August, 9=September, O=October, Y=November, Z=December.

Third digit shows the week of the month.

Fourth digit shows the day of the week. 1=Monday, 2=Tuesday, 3=Wednesday,

4=Thursday , 5=Friday, 6=Saturday, 7=Sunday.

For example, the code 7612 is interpreted as:

Manufactured on June 3, 1997

RAM Memory Battery Backup Connection Path

CMOS RAM memory is a volatile type of memory, which means that it can lose its contents

(ladder program, configuration, etc.) if power is removed. To retain RAM memory contents

under no-power conditions, a long-life lithium battery is provided. This battery is normally

mounted in the rack’s Power Supply module. To avoid accidental disconnection of the

memory backup battery, it is beneficial to know the connection path between the battery

and the memory circuits:

6-6

Series 90-30 PLC Installation and Hardware Manual - October 1999

GFK-0356P

For embedded CPUs: The battery connection path to RAM memory is through the Power

Supply’s baseplate connector and across the backplane board to the RAM circuits.

For modular CPUs: The battery connection path to RAM memory is through the Power

Supply’s baseplate connector, across the backplane board, and through the CPUs baseplate

connector to the RAM circuits inside the CPU module.

Obviously, removing the Power Supply module from the PLC breaks the connection

between the backup battery and the RAM memory circuits for both embedded and

modular CPUs. Also, in a modular CPU system, removing the CPU module would

disconnect the backup battery from the memory circuits. In addition, to avoid the possible

problems associated with losing the contents of RAM memory, we recommend that you

maintain an up-to-date backup copy of your program folder. Instructions for creating

program folder backups can be found in the Logicmaster 90, Series 90-30 Programming Software

User’s Manual, GFK-0466, Control User’s Guide, GFK-1295, and VersaPro Programming Software

User’s Guide, GFK-1670.

Super Capacitor Memory Backup

Besides the backup battery, the RAM memory circuits in both Embedded and Modular

CPUs are further protected by a ”super capacitor,” which can store enough charge to

maintain memory for a short time if the battery is disconnected. The amount of protection

time provided by the super capacitor depends on the following:

The PLC power supply supplies 5 VDC to the memory circuits, including the super

capacitor. Therefore, when PLC power is turned off, the super capacitor has an

initial 5 VDC charge. If the battery is also disconnected shortly after PLC power is

turned off, the super capacitor will begin discharging from the 5 VDC level until its

charge reaches 2 VDC, at which time memory contents will be lost. When used this

way, the super capacitor can maintain memory contents for a minimum of 1 hour.

The memory backup battery supplies 3 VDC to the memory circuits, including the

super capacitor. Therefore, if PLC power has been turned off for an hour or more

and only the battery is powering the memory circuits, the super capacitor has a 3

VDC charge. Then, if the battery is disconnected, the super capacitor will begin

discharging from the 3VDC level until its charge reaches 2 VDC, at which time

memory contents will be lost. When used this way, the super capacitor can maintain

memory contents for a minimum of 20 minutes.

Maintaining RAM Memory During Storage or Shipment of a CPU

Modular CPUs

Modular CPUs have an internal connector for a backup battery so that RAM memory

contents can be retained while the CPU is being stored or shipped. This arrangement

should not to be used when the CPU module is installed in the baseplate and the backup

battery is installed in the power supply. To use a backup battery in the CPU module, it is

necessary to remove the front cover of the CPU module. This can be accomplished by

following these steps:

To avoid losing memory contents once the CPU is removed from the PLC, we

recommend you install the backup battery into the CPU within 20 minutes. First,

make sure PLC power is off, then remove the CPU module.

Gently squeeze the front cover of the CPU module and pull it forward, away from

the module case, while gently pressing in on the 4 front cover tabs sequentially with

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a small screwdriver. The front cover tabs latch into holes on each side of the module

case (refer to Figure 2-1 for location of front cover holding tabs).

After removing the front cover, plug the memory backup battery into the two-prong

battery connector on the front of the CPU module’s printed circuit board.

While the battery is connected to the CPU, you will have to leave the CPU’s front

cover off. Also, the battery should be temporarily secured to the module with cable

ties or tape to keep it from being accidentally damaged or disconnected.

The Battery Accessory Kit, described below, may also be used on a Modular CPU

baseplate if the power supply has to be removed. This would require leaving the CPU

module mounted in the baseplate.

Embedded CPUs

Embedded CPU Models 311, 313, and 323 can be stored or shipped with a power supply

installed and the power supply battery connected in order to maintain the contents of

RAM memory. However, another option (that doesn’t require the use of a power

supply) is to use the Battery Accessory Kit, described next.

Battery Accessory Kit (IC693ACC315)

The Battery Accessory Kit (IC693ACC315) lets you maintain RAM memory contents

without using a power supply. It is useful for maintaining memory contents while a

baseplate is being stored or shipped. The Battery Accessory Kit consists of a battery with

an attached connector mounted on a circuit board. The circuit board has a connector

that plugs into the power supply backplane connector (see the figure below). The

Battery Accessory Kit can be used on either Embedded or Modular Series 90-30 CPU

baseplates.

a45076

ÎÎ

POWER

SUPPLY

CONNECTOR

BATTERY

PLUG

ÎÎ

Figure 6-2. Installing the Battery Accessory Kit

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Series 90-30 PLC Installation and Hardware Manual - October 1999

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Battery Accessory Kit Installation

Insert the plug on the end of the battery cable into the 2-pin connector on the Battery

Accessory board. The battery plug is normally not plugged into the accessory

connector. This prevents accidental discharge of the battery during storage and

handling.

Align the backplane connector on the Battery Accessory board with the power

supply connector on the baseplate backplane. Push the Battery Accessory board

toward the baseplate until it is fully seated. See the figure above.

If the baseplate is to be shipped with the Battery Accessory board installed, ensure

that the board is held in place by packing material or cable ties. The cable ties can be

installed in holes provided on both ends of the accessory board and secured to the

baseplate.

Caution

To avoid losing CPU data, the Battery Accessory must be installed

within 1 hour after turning off PLC power, or 20 minutes after

removing the memory backup battery. See the section “Super

Capacitor Memory Backup” section for details.

When the Battery Accessory is removed, a power supply module with a

good battery must be installed and/or input power applied within 20

minutes to avoid losing CPU data. See the section “Super Capacitor

Memory Backup” section for details.

Batteries in Power Supplies on Expansion or Remote Racks

Batteries in power supplies on Expansion or Remote racks, are not in use. Only the

battery in a CPU rack supplies backup power to RAM memory. Batteries in non-CPU

racks may be removed and used as spares, if they meet the age requirements stated

previously in this chapter.

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FANUC Series 90-30 PLC. Installation and Hardware Manual (GFK-0356P) - page 5