field-effect transistor (FET)
a majority-
carrier device that behaves like a bipolar tran-
sistor with the important difference that the
gate has a very high input impedance and
therefore draws no current.
An active device with three terminals —
gate, source, and drain — in the active (am-
plifier) mode of operation, the drain current is
related to the gate-source voltage. The rela-
tionship is usually approximated by a square
law, but there are significant deviations from
the square law depending on factors such as
device geometry. The FET can also be used
as a switch, with the gate-source voltage con-
trolling the “on/off” state of the conducting
channel between source and drain terminals.
The input resistance at the gate is extremely
high (usually of order tens of megaohms) and
the gate current is negligibly small (usually
of order picoamperes or less).
There are various families of FETs, in-
cluding MOSFETs and JFETs. Within each
family, there are two types of FET, n-channel
and p-channel (named for the sign of the ma-
jority carriers that form the current conduct-
ing path between source and drain).
Some FETs also have a fourth terminal,
the “substrate” or “body” terminal. The p-
n junctions between the substrate and the
drain and source terminals should be reverse-
biased to insure proper device operation.
field-oriented control
speed control of
an induction motor obtained by varying the
magnitude and orientation of the airgap mag-
netic field. This is also referred to as vector
control and requires sensing of the rotor po-
sition. Vector controllers allow the induction
motor to operate very much like a DC mo-
tor, including development of rated torque at
zero speed.
field-programmable gate array (FPGA)
(1) a programmable logic device that consists
of a matrix of programmable cells embedded
in a programmable routing mesh. The com-
bined programming of the cell functions and
routing network define the function of the de-
vice.
(2) a gate array with a programmable
multi-level logic network.
Reprogramma-
bility of FPGAs make them generic hard-
ware and allow them to be reprogrammed to
serve many different applications. FPGAs
consist of SRAMS, gates, latches, and pro-
grammable interconnects.
FIFO
See
first-in-first-out
.
FIFO memory
commonly known as a
queue. It is a structure where objects are
taken out of the structure in the order they
were put in. Compare this with a LIFO mem-
ory or stack. A FIFO is useful for buffering
data in an asynchronous transmission where
the sender and receiver are not synchronized:
the sender places data objects in the FIFO
memory, while the receiver collects the ob-
jects from it.
figure of merit
performance evaluation
measure for the various target and equipment
parameters of a sonar system. It is a subset of
the broader sonar performance given by the
sonar equations, which includes reverbera-
tion effects.
file format
the structure of the computer
file in which an image is stored. Often the
format consists of a fixed-size header fol-
lowed by the pixel values written from the
top to the bottom row and within a row
from the left to the right column. However,
it is also common to compress the image.
See also
Graphics Interchange Format
,
header
,
image compression
,
tagged image file format
(TIFF)
.
Filippov method
a definition of a solution
to a system of first-order differential equa-
tions with discontinuous right-hand side,
˙x = f(t, x) ,
proposed by A. F. Filippov. A vector func-
tion x
(t) defined on the interval [t
1
, t
2
] is
a solution to the above system of differen-
tial equations in the sense of Filippov, if it
is absolutely continuous and for almost all
c
2000 by CRC Press LLC