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Extended Range Color format for single Y12 plane.
CU_EGL_COLOR_FORMAT_YUVA = 0x66
Y, U, V, A four channels in one surface, interleaved as AVUY.
CU_EGL_COLOR_FORMAT_YUV = 0x67
Y, U, V three channels in one surface, interleaved as VUY. Only pitch linear format supported.
CU_EGL_COLOR_FORMAT_YVYU = 0x68
Y, U, V in one surface, interleaved as YVYU in one channel.
CU_EGL_COLOR_FORMAT_VYUY = 0x69
Y, U, V in one surface, interleaved as VYUY in one channel.
CU_EGL_COLOR_FORMAT_Y10V10U10_420_SEMIPLANAR_ER = 0x6A
Extended Range Y10, V10U10 in two surfaces(VU as one surface) U/V width = 1/2 Y width, U/V
height = 1/2 Y height.
CU_EGL_COLOR_FORMAT_Y10V10U10_420_SEMIPLANAR_709_ER = 0x6B
Extended Range Y10, V10U10 in two surfaces(VU as one surface) U/V width = 1/2 Y width, U/V
height = 1/2 Y height.
CU_EGL_COLOR_FORMAT_Y10V10U10_444_SEMIPLANAR_ER = 0x6C
Extended Range Y10, V10U10 in two surfaces (VU as one surface) U/V width = Y width, U/V
height = Y height.
CU_EGL_COLOR_FORMAT_Y10V10U10_444_SEMIPLANAR_709_ER = 0x6D
Extended Range Y10, V10U10 in two surfaces (VU as one surface) U/V width = Y width, U/V
height = Y height.
CU_EGL_COLOR_FORMAT_Y12V12U12_420_SEMIPLANAR_ER = 0x6E
Extended Range Y12, V12U12 in two surfaces (VU as one surface) U/V width = 1/2 Y width, U/V
height = 1/2 Y height.
CU_EGL_COLOR_FORMAT_Y12V12U12_420_SEMIPLANAR_709_ER = 0x6F
Extended Range Y12, V12U12 in two surfaces (VU as one surface) U/V width = 1/2 Y width, U/V
height = 1/2 Y height.
CU_EGL_COLOR_FORMAT_Y12V12U12_444_SEMIPLANAR_ER = 0x70
Extended Range Y12, V12U12 in two surfaces (VU as one surface) U/V width = Y width, U/V
height = Y height.
CU_EGL_COLOR_FORMAT_Y12V12U12_444_SEMIPLANAR_709_ER = 0x71
Extended Range Y12, V12U12 in two surfaces (VU as one surface) U/V width = Y width, U/V
height = Y height.
CU_EGL_COLOR_FORMAT_UYVY_709 = 0x72
Y, U, V in one surface, interleaved as UYVY in one channel.
CU_EGL_COLOR_FORMAT_UYVY_709_ER = 0x73
Extended Range Y, U, V in one surface, interleaved as UYVY in one channel.
CU_EGL_COLOR_FORMAT_UYVY_2020 = 0x74
Y, U, V in one surface, interleaved as UYVY in one channel.
CU_EGL_COLOR_FORMAT_MAX
enum CUeglFrameType
CUDA EglFrame type - array or pointer
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Values
CU_EGL_FRAME_TYPE_ARRAY = 0
Frame type CUDA array
CU_EGL_FRAME_TYPE_PITCH = 1
Frame type pointer
enum CUeglResourceLocationFlags
Resource location flags- sysmem or vidmem
For CUDA context on iGPU, since video and system memory are equivalent - these flags will not have
an effect on the execution.
For CUDA context on dGPU, applications can use the flag CUeglResourceLocationFlags to give a hint
about the desired location.
CU_EGL_RESOURCE_LOCATION_SYSMEM - the frame data is made resident on the system
memory to be accessed by CUDA.
CU_EGL_RESOURCE_LOCATION_VIDMEM - the frame data is made resident on the dedicated
video memory to be accessed by CUDA.
There may be an additional latency due to new allocation and data migration, if the frame is produced
on a different memory.
Values
CU_EGL_RESOURCE_LOCATION_SYSMEM = 0x00
Resource location sysmem
CU_EGL_RESOURCE_LOCATION_VIDMEM = 0x01
Resource location vidmem
enum CUevent_flags
Event creation flags
Values
CU_EVENT_DEFAULT = 0x0
Default event flag
CU_EVENT_BLOCKING_SYNC = 0x1
Event uses blocking synchronization
CU_EVENT_DISABLE_TIMING = 0x2
Event will not record timing data
CU_EVENT_INTERPROCESS = 0x4
Event is suitable for interprocess use. CU_EVENT_DISABLE_TIMING must be set
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enum CUevent_record_flags
Event record flags
Values
CU_EVENT_RECORD_DEFAULT = 0x0
Default event record flag
CU_EVENT_RECORD_EXTERNAL = 0x1
When using stream capture, create an event record node instead of the default behavior. This flag is
invalid when used outside of capture.
enum CUevent_sched_flags
Event sched flags
Values
CU_EVENT_SCHED_AUTO = 0x00
Automatic scheduling
CU_EVENT_SCHED_SPIN = 0x01
Set spin as default scheduling
CU_EVENT_SCHED_YIELD = 0x02
Set yield as default scheduling
CU_EVENT_SCHED_BLOCKING_SYNC = 0x04
Set blocking synchronization as default scheduling
enum CUevent_wait_flags
Event wait flags
Values
CU_EVENT_WAIT_DEFAULT = 0x0
Default event wait flag
CU_EVENT_WAIT_EXTERNAL = 0x1
When using stream capture, create an event wait node instead of the default behavior. This flag is
invalid when used outside of capture.
enum CUexecAffinityType
Execution Affinity Types
Values
CU_EXEC_AFFINITY_TYPE_SM_COUNT = 0
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Create a context with limited SMs.
CU_EXEC_AFFINITY_TYPE_MAX
enum CUexternalMemoryHandleType
External memory handle types
Values
CU_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD = 1
Handle is an opaque file descriptor
CU_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_WIN32 = 2
Handle is an opaque shared NT handle
CU_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_WIN32_KMT = 3
Handle is an opaque, globally shared handle
CU_EXTERNAL_MEMORY_HANDLE_TYPE_D3D12_HEAP = 4
Handle is a D3D12 heap object
CU_EXTERNAL_MEMORY_HANDLE_TYPE_D3D12_RESOURCE = 5
Handle is a D3D12 committed resource
CU_EXTERNAL_MEMORY_HANDLE_TYPE_D3D11_RESOURCE = 6
Handle is a shared NT handle to a D3D11 resource
CU_EXTERNAL_MEMORY_HANDLE_TYPE_D3D11_RESOURCE_KMT = 7
Handle is a globally shared handle to a D3D11 resource
CU_EXTERNAL_MEMORY_HANDLE_TYPE_NVSCIBUF = 8
Handle is an NvSciBuf object
enum CUexternalSemaphoreHandleType
External semaphore handle types
Values
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD = 1
Handle is an opaque file descriptor
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_WIN32 = 2
Handle is an opaque shared NT handle
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_WIN32_KMT = 3
Handle is an opaque, globally shared handle
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_D3D12_FENCE = 4
Handle is a shared NT handle referencing a D3D12 fence object
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_D3D11_FENCE = 5
Handle is a shared NT handle referencing a D3D11 fence object
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_NVSCISYNC = 6
Opaque handle to NvSciSync Object
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_D3D11_KEYED_MUTEX = 7
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Handle is a shared NT handle referencing a D3D11 keyed mutex object
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_D3D11_KEYED_MUTEX_KMT = 8
Handle is a globally shared handle referencing a D3D11 keyed mutex object
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_TIMELINE_SEMAPHORE_FD = 9
Handle is an opaque file descriptor referencing a timeline semaphore
CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_TIMELINE_SEMAPHORE_WIN32 = 10
Handle is an opaque shared NT handle referencing a timeline semaphore
enum CUfilter_mode
Texture reference filtering modes
Values
CU_TR_FILTER_MODE_POINT = 0
Point filter mode
CU_TR_FILTER_MODE_LINEAR = 1
Linear filter mode
enum CUflushGPUDirectRDMAWritesOptions
Bitmasks for CU_DEVICE_ATTRIBUTE_GPU_DIRECT_RDMA_FLUSH_WRITES_OPTIONS
Values
CU_FLUSH_GPU_DIRECT_RDMA_WRITES_OPTION_HOST = 1<<0
cuFlushGPUDirectRDMAWrites() and its CUDA Runtime API counterpart are supported on the
device.
CU_FLUSH_GPU_DIRECT_RDMA_WRITES_OPTION_MEMOPS = 1<<1
The CU_STREAM_WAIT_VALUE_FLUSH flag and the
CU_STREAM_MEM_OP_FLUSH_REMOTE_WRITES MemOp are supported on the device.
enum CUflushGPUDirectRDMAWritesScope
The scopes for cuFlushGPUDirectRDMAWrites
Values
CU_FLUSH_GPU_DIRECT_RDMA_WRITES_TO_OWNER = 100
Blocks until remote writes are visible to the CUDA device context owning the data.
CU_FLUSH_GPU_DIRECT_RDMA_WRITES_TO_ALL_DEVICES = 200
Blocks until remote writes are visible to all CUDA device contexts.
enum CUflushGPUDirectRDMAWritesTarget
The targets for cuFlushGPUDirectRDMAWrites
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Values
CU_FLUSH_GPU_DIRECT_RDMA_WRITES_TARGET_CURRENT_CTX = 0
Sets the target for cuFlushGPUDirectRDMAWrites() to the currently active CUDA device context.
enum CUfunc_cache
Function cache configurations
Values
CU_FUNC_CACHE_PREFER_NONE = 0x00
no preference for shared memory or L1 (default)
CU_FUNC_CACHE_PREFER_SHARED = 0x01
prefer larger shared memory and smaller L1 cache
CU_FUNC_CACHE_PREFER_L1 = 0x02
prefer larger L1 cache and smaller shared memory
CU_FUNC_CACHE_PREFER_EQUAL = 0x03
prefer equal sized L1 cache and shared memory
enum CUfunction_attribute
Function properties
Values
CU_FUNC_ATTRIBUTE_MAX_THREADS_PER_BLOCK = 0
The maximum number of threads per block, beyond which a launch of the function would fail. This
number depends on both the function and the device on which the function is currently loaded.
CU_FUNC_ATTRIBUTE_SHARED_SIZE_BYTES = 1
The size in bytes of statically-allocated shared memory required by this function. This does not
include dynamically-allocated shared memory requested by the user at runtime.
CU_FUNC_ATTRIBUTE_CONST_SIZE_BYTES = 2
The size in bytes of user-allocated constant memory required by this function.
CU_FUNC_ATTRIBUTE_LOCAL_SIZE_BYTES = 3
The size in bytes of local memory used by each thread of this function.
CU_FUNC_ATTRIBUTE_NUM_REGS = 4
The number of registers used by each thread of this function.
CU_FUNC_ATTRIBUTE_PTX_VERSION = 5
The PTX virtual architecture version for which the function was compiled. This value is the major
PTX version * 10 + the minor PTX version, so a PTX version 1.3 function would return the value
13. Note that this may return the undefined value of 0 for cubins compiled prior to CUDA 3.0.
CU_FUNC_ATTRIBUTE_BINARY_VERSION = 6
The binary architecture version for which the function was compiled. This value is the major binary
version * 10 + the minor binary version, so a binary version 1.3 function would return the value 13.
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Note that this will return a value of 10 for legacy cubins that do not have a properly-encoded binary
architecture version.
CU_FUNC_ATTRIBUTE_CACHE_MODE_CA = 7
The attribute to indicate whether the function has been compiled with user specified option "-Xptxas
--dlcm=ca" set .
CU_FUNC_ATTRIBUTE_MAX_DYNAMIC_SHARED_SIZE_BYTES = 8
The maximum size in bytes of dynamically-allocated shared memory that can be used by this
function. If the user-specified dynamic shared memory size is larger than this value, the launch will
fail. See cuFuncSetAttribute, cuKernelSetAttribute
CU_FUNC_ATTRIBUTE_PREFERRED_SHARED_MEMORY_CARVEOUT = 9
On devices where the L1 cache and shared memory use the same hardware resources, this
sets the shared memory carveout preference, in percent of the total shared memory. Refer to
CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_MULTIPROCESSOR. This
is only a hint, and the driver can choose a different ratio if required to execute the function. See
cuFuncSetAttribute, cuKernelSetAttribute
CU_FUNC_ATTRIBUTE_CLUSTER_SIZE_MUST_BE_SET = 10
If this attribute is set, the kernel must launch with a valid cluster size specified. See
cuFuncSetAttribute, cuKernelSetAttribute
CU_FUNC_ATTRIBUTE_REQUIRED_CLUSTER_WIDTH = 11
The required cluster width in blocks. The values must either all be 0 or all be positive. The validity
of the cluster dimensions is otherwise checked at launch time.If the value is set during compile time,
it cannot be set at runtime. Setting it at runtime will return CUDA_ERROR_NOT_PERMITTED.
See cuFuncSetAttribute, cuKernelSetAttribute
CU_FUNC_ATTRIBUTE_REQUIRED_CLUSTER_HEIGHT = 12
The required cluster height in blocks. The values must either all be 0 or all be positive. The validity
of the cluster dimensions is otherwise checked at launch time.If the value is set during compile time,
it cannot be set at runtime. Setting it at runtime should return CUDA_ERROR_NOT_PERMITTED.
See cuFuncSetAttribute, cuKernelSetAttribute
CU_FUNC_ATTRIBUTE_REQUIRED_CLUSTER_DEPTH = 13
The required cluster depth in blocks. The values must either all be 0 or all be positive. The validity
of the cluster dimensions is otherwise checked at launch time.If the value is set during compile time,
it cannot be set at runtime. Setting it at runtime should return CUDA_ERROR_NOT_PERMITTED.
See cuFuncSetAttribute, cuKernelSetAttribute
CU_FUNC_ATTRIBUTE_NON_PORTABLE_CLUSTER_SIZE_ALLOWED = 14
Whether the function can be launched with non-portable cluster size. 1 is allowed, 0 is disallowed.
A non-portable cluster size may only function on the specific SKUs the program is tested on. The
launch might fail if the program is run on a different hardware platform.CUDA API provides
cudaOccupancyMaxActiveClusters to assist with checking whether the desired size can be launched
on the current device.Portable Cluster SizeA portable cluster size is guaranteed to be functional
on all compute capabilities higher than the target compute capability. The portable cluster size
for sm_90 is 8 blocks per cluster. This value may increase for future compute capabilities.The
specific hardware unit may support higher cluster sizes that’s not guaranteed to be portable. See
cuFuncSetAttribute, cuKernelSetAttribute
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CU_FUNC_ATTRIBUTE_CLUSTER_SCHEDULING_POLICY_PREFERENCE = 15
The block scheduling policy of a function. The value type is CUclusterSchedulingPolicy /
cudaClusterSchedulingPolicy. See cuFuncSetAttribute, cuKernelSetAttribute
CU_FUNC_ATTRIBUTE_MAX
enum CUGPUDirectRDMAWritesOrdering
Platform native ordering for GPUDirect RDMA writes
Values
CU_GPU_DIRECT_RDMA_WRITES_ORDERING_NONE = 0
The device does not natively support ordering of remote writes. cuFlushGPUDirectRDMAWrites()
can be leveraged if supported.
CU_GPU_DIRECT_RDMA_WRITES_ORDERING_OWNER = 100
Natively, the device can consistently consume remote writes, although other CUDA devices may
not.
CU_GPU_DIRECT_RDMA_WRITES_ORDERING_ALL_DEVICES = 200
Any CUDA device in the system can consistently consume remote writes to this device.
enum CUgraphChildGraphNodeOwnership
Child graph node ownership
Values
CU_GRAPH_CHILD_GRAPH_OWNERSHIP_CLONE = 0
Default behavior for a child graph node. Child graph is cloned into the parent and memory
allocation/free nodes can't be present in the child graph.
CU_GRAPH_CHILD_GRAPH_OWNERSHIP_MOVE = 1
The child graph is moved to the parent. The handle to the child graph is owned by the parent and
will be destroyed when the parent is destroyed.The following restrictions apply to child graphs after
they have been moved: Cannot be independently instantiated or destroyed; Cannot be added as a
child graph of a separate parent graph; Cannot be used as an argument to cuGraphExecUpdate;
Cannot have additional memory allocation or free nodes added.
enum CUgraphConditionalNodeType
Conditional node types
Values
CU_GRAPH_COND_TYPE_IF = 0
Conditional 'if/else' Node. Body[0] executed if condition is non-zero. If size == 2, an optional
ELSE graph is created and this is executed if the condition is zero.
CU_GRAPH_COND_TYPE_WHILE = 1
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Conditional 'while' Node. Body executed repeatedly while condition value is non-zero.
CU_GRAPH_COND_TYPE_SWITCH = 2
Conditional 'switch' Node. Body[n] is executed once, where 'n' is the value of the condition. If the
condition does not match a body index, no body is launched.
enum CUgraphDebugDot_flags
The additional write options for cuGraphDebugDotPrint
Values
CU_GRAPH_DEBUG_DOT_FLAGS_VERBOSE = 1<<0
Output all debug data as if every debug flag is enabled
CU_GRAPH_DEBUG_DOT_FLAGS_RUNTIME_TYPES = 1<<1
Use CUDA Runtime structures for output
CU_GRAPH_DEBUG_DOT_FLAGS_KERNEL_NODE_PARAMS = 1<<2
Adds CUDA_KERNEL_NODE_PARAMS values to output
CU_GRAPH_DEBUG_DOT_FLAGS_MEMCPY_NODE_PARAMS = 1<<3
Adds CUDA_MEMCPY3D values to output
CU_GRAPH_DEBUG_DOT_FLAGS_MEMSET_NODE_PARAMS = 1<<4
Adds CUDA_MEMSET_NODE_PARAMS values to output
CU_GRAPH_DEBUG_DOT_FLAGS_HOST_NODE_PARAMS = 1<<5
Adds CUDA_HOST_NODE_PARAMS values to output
CU_GRAPH_DEBUG_DOT_FLAGS_EVENT_NODE_PARAMS = 1<<6
Adds CUevent handle from record and wait nodes to output
CU_GRAPH_DEBUG_DOT_FLAGS_EXT_SEMAS_SIGNAL_NODE_PARAMS = 1<<7
Adds CUDA_EXT_SEM_SIGNAL_NODE_PARAMS values to output
CU_GRAPH_DEBUG_DOT_FLAGS_EXT_SEMAS_WAIT_NODE_PARAMS = 1<<8
Adds CUDA_EXT_SEM_WAIT_NODE_PARAMS values to output
CU_GRAPH_DEBUG_DOT_FLAGS_KERNEL_NODE_ATTRIBUTES = 1<<9
Adds CUkernelNodeAttrValue values to output
CU_GRAPH_DEBUG_DOT_FLAGS_HANDLES = 1<<10
Adds node handles and every kernel function handle to output
CU_GRAPH_DEBUG_DOT_FLAGS_MEM_ALLOC_NODE_PARAMS = 1<<11
Adds memory alloc node parameters to output
CU_GRAPH_DEBUG_DOT_FLAGS_MEM_FREE_NODE_PARAMS = 1<<12
Adds memory free node parameters to output
CU_GRAPH_DEBUG_DOT_FLAGS_BATCH_MEM_OP_NODE_PARAMS = 1<<13
Adds batch mem op node parameters to output
CU_GRAPH_DEBUG_DOT_FLAGS_EXTRA_TOPO_INFO = 1<<14
Adds edge numbering information
CU_GRAPH_DEBUG_DOT_FLAGS_CONDITIONAL_NODE_PARAMS = 1<<15
Adds conditional node parameters to output
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enum CUgraphDependencyType
Type annotations that can be applied to graph edges as part of CUgraphEdgeData.
Values
CU_GRAPH_DEPENDENCY_TYPE_DEFAULT = 0
This is an ordinary dependency.
CU_GRAPH_DEPENDENCY_TYPE_PROGRAMMATIC = 1
This dependency type allows the downstream node to use
cudaGridDependencySynchronize() . It may only be used between kernel nodes, and
must be used with either the CU_GRAPH_KERNEL_NODE_PORT_PROGRAMMATIC or
CU_GRAPH_KERNEL_NODE_PORT_LAUNCH_ORDER outgoing port.
enum CUgraphExecUpdateResult
CUDA Graph Update error types
Values
CU_GRAPH_EXEC_UPDATE_SUCCESS = 0x0
The update succeeded
CU_GRAPH_EXEC_UPDATE_ERROR = 0x1
The update failed for an unexpected reason which is described in the return value of the function
CU_GRAPH_EXEC_UPDATE_ERROR_TOPOLOGY_CHANGED = 0x2
The update failed because the topology changed
CU_GRAPH_EXEC_UPDATE_ERROR_NODE_TYPE_CHANGED = 0x3
The update failed because a node type changed
CU_GRAPH_EXEC_UPDATE_ERROR_FUNCTION_CHANGED = 0x4
The update failed because the function of a kernel node changed (CUDA driver < 11.2)
CU_GRAPH_EXEC_UPDATE_ERROR_PARAMETERS_CHANGED = 0x5
The update failed because the parameters changed in a way that is not supported
CU_GRAPH_EXEC_UPDATE_ERROR_NOT_SUPPORTED = 0x6
The update failed because something about the node is not supported
CU_GRAPH_EXEC_UPDATE_ERROR_UNSUPPORTED_FUNCTION_CHANGE = 0x7
The update failed because the function of a kernel node changed in an unsupported way
CU_GRAPH_EXEC_UPDATE_ERROR_ATTRIBUTES_CHANGED = 0x8
The update failed because the node attributes changed in a way that is not supported
enum CUgraphicsMapResourceFlags
Flags for mapping and unmapping interop resources
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Values
CU_GRAPHICS_MAP_RESOURCE_FLAGS_NONE = 0x00
CU_GRAPHICS_MAP_RESOURCE_FLAGS_READ_ONLY = 0x01
CU_GRAPHICS_MAP_RESOURCE_FLAGS_WRITE_DISCARD = 0x02
enum CUgraphicsRegisterFlags
Flags to register a graphics resource
Values
CU_GRAPHICS_REGISTER_FLAGS_NONE = 0x00
CU_GRAPHICS_REGISTER_FLAGS_READ_ONLY = 0x01
CU_GRAPHICS_REGISTER_FLAGS_WRITE_DISCARD = 0x02
CU_GRAPHICS_REGISTER_FLAGS_SURFACE_LDST = 0x04
CU_GRAPHICS_REGISTER_FLAGS_TEXTURE_GATHER = 0x08
enum CUgraphInstantiate_flags
Flags for instantiating a graph
Values
CUDA_GRAPH_INSTANTIATE_FLAG_AUTO_FREE_ON_LAUNCH = 1
Automatically free memory allocated in a graph before relaunching.
CUDA_GRAPH_INSTANTIATE_FLAG_UPLOAD = 2
Automatically upload the graph after instantiation. Only supported by
cuGraphInstantiateWithParams. The upload will be performed using the stream provided in
instantiateParams.
CUDA_GRAPH_INSTANTIATE_FLAG_DEVICE_LAUNCH = 4
Instantiate the graph to be launchable from the device. This flag can only be used on
platforms which support unified addressing. This flag cannot be used in conjunction with
CUDA_GRAPH_INSTANTIATE_FLAG_AUTO_FREE_ON_LAUNCH.
CUDA_GRAPH_INSTANTIATE_FLAG_USE_NODE_PRIORITY = 8
Run the graph using the per-node priority attributes rather than the priority of the stream it is
launched into.
enum CUgraphInstantiateResult
Graph instantiation results
Values
CUDA_GRAPH_INSTANTIATE_SUCCESS = 0
Instantiation succeeded
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CUDA_GRAPH_INSTANTIATE_ERROR = 1
Instantiation failed for an unexpected reason which is described in the return value of the function
CUDA_GRAPH_INSTANTIATE_INVALID_STRUCTURE = 2
Instantiation failed due to invalid structure, such as cycles
CUDA_GRAPH_INSTANTIATE_NODE_OPERATION_NOT_SUPPORTED = 3
Instantiation for device launch failed because the graph contained an unsupported operation
CUDA_GRAPH_INSTANTIATE_MULTIPLE_CTXS_NOT_SUPPORTED = 4
Instantiation for device launch failed due to the nodes belonging to different contexts
CUDA_GRAPH_INSTANTIATE_CONDITIONAL_HANDLE_UNUSED = 5
One or more conditional handles are not associated with conditional nodes
enum CUgraphNodeType
Graph node types
Values
CU_GRAPH_NODE_TYPE_KERNEL = 0
GPU kernel node
CU_GRAPH_NODE_TYPE_MEMCPY = 1
Memcpy node
CU_GRAPH_NODE_TYPE_MEMSET = 2
Memset node
CU_GRAPH_NODE_TYPE_HOST = 3
Host (executable) node
CU_GRAPH_NODE_TYPE_GRAPH = 4
Node which executes an embedded graph
CU_GRAPH_NODE_TYPE_EMPTY = 5
Empty (no-op) node
CU_GRAPH_NODE_TYPE_WAIT_EVENT = 6
External event wait node
CU_GRAPH_NODE_TYPE_EVENT_RECORD = 7
External event record node
CU_GRAPH_NODE_TYPE_EXT_SEMAS_SIGNAL = 8
External semaphore signal node
CU_GRAPH_NODE_TYPE_EXT_SEMAS_WAIT = 9
External semaphore wait node
CU_GRAPH_NODE_TYPE_MEM_ALLOC = 10
Memory Allocation Node
CU_GRAPH_NODE_TYPE_MEM_FREE = 11
Memory Free Node
CU_GRAPH_NODE_TYPE_BATCH_MEM_OP = 12
Batch MemOp Node
CU_GRAPH_NODE_TYPE_CONDITIONAL = 13
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Conditional NodeMay be used to implement a conditional execution path or loop inside of a graph.
The graph(s) contained within the body of the conditional node can be selectively executed or
iterated upon based on the value of a conditional variable.Handles must be created in advance of
creating the node using cuGraphConditionalHandleCreate.The following restrictions apply to graphs
which contain conditional nodes: The graph cannot be used in a child node. Only one instantiation
of the graph may exist at any point in time. The graph cannot be cloned.To set the control value,
supply a default value when creating the handle and/or call cudaGraphSetConditional from device
code.
enum CUipcMem_flags
CUDA Ipc Mem Flags
Values
CU_IPC_MEM_LAZY_ENABLE_PEER_ACCESS = 0x1
Automatically enable peer access between remote devices as needed
enum CUjit_cacheMode
Caching modes for dlcm
Values
CU_JIT_CACHE_OPTION_NONE = 0
Compile with no -dlcm flag specified
CU_JIT_CACHE_OPTION_CG
Compile with L1 cache disabled
CU_JIT_CACHE_OPTION_CA
Compile with L1 cache enabled
enum CUjit_fallback
Cubin matching fallback strategies
Values
CU_PREFER_PTX = 0
Prefer to compile ptx if exact binary match not found
CU_PREFER_BINARY
Prefer to fall back to compatible binary code if exact match not found
enum CUjit_option
Online compiler and linker options
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Values
CU_JIT_MAX_REGISTERS = 0
Max number of registers that a thread may use. Option type: unsigned int Applies to: compiler only
CU_JIT_THREADS_PER_BLOCK = 1
IN: Specifies minimum number of threads per block to target compilation for OUT: Returns the
number of threads the compiler actually targeted. This restricts the resource utilization of the
compiler (e.g. max registers) such that a block with the given number of threads should be able
to launch based on register limitations. Note, this option does not currently take into account
any other resource limitations, such as shared memory utilization. Cannot be combined with
CU_JIT_TARGET. Option type: unsigned int Applies to: compiler only
CU_JIT_WALL_TIME = 2
Overwrites the option value with the total wall clock time, in milliseconds, spent in the compiler and
linker Option type: float Applies to: compiler and linker
CU_JIT_INFO_LOG_BUFFER = 3
Pointer to a buffer in which to print any log messages that are informational in nature (the buffer
size is specified via option CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES) Option type: char *
Applies to: compiler and linker
CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES = 4
IN: Log buffer size in bytes. Log messages will be capped at this size (including null terminator)
OUT: Amount of log buffer filled with messages Option type: unsigned int Applies to: compiler and
linker
CU_JIT_ERROR_LOG_BUFFER = 5
Pointer to a buffer in which to print any log messages that reflect errors (the buffer size is specified
via option CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES) Option type: char * Applies to:
compiler and linker
CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES = 6
IN: Log buffer size in bytes. Log messages will be capped at this size (including null terminator)
OUT: Amount of log buffer filled with messages Option type: unsigned int Applies to: compiler and
linker
CU_JIT_OPTIMIZATION_LEVEL = 7
Level of optimizations to apply to generated code (0 - 4), with 4 being the default and highest level
of optimizations. Option type: unsigned int Applies to: compiler only
CU_JIT_TARGET_FROM_CUCONTEXT = 8
No option value required. Determines the target based on the current attached context (default)
Option type: No option value needed Applies to: compiler and linker
CU_JIT_TARGET = 9
Target is chosen based on supplied CUjit_target. Cannot be combined with
CU_JIT_THREADS_PER_BLOCK. Option type: unsigned int for enumerated type CUjit_target
Applies to: compiler and linker
CU_JIT_FALLBACK_STRATEGY = 10
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Specifies choice of fallback strategy if matching cubin is not found. Choice is based on supplied
CUjit_fallback. This option cannot be used with cuLink* APIs as the linker requires exact matches.
Option type: unsigned int for enumerated type CUjit_fallback Applies to: compiler only
CU_JIT_GENERATE_DEBUG_INFO = 11
Specifies whether to create debug information in output (-g) (0: false, default) Option type: int
Applies to: compiler and linker
CU_JIT_LOG_VERBOSE = 12
Generate verbose log messages (0: false, default) Option type: int Applies to: compiler and linker
CU_JIT_GENERATE_LINE_INFO = 13
Generate line number information (-lineinfo) (0: false, default) Option type: int Applies to: compiler
only
CU_JIT_CACHE_MODE = 14
Specifies whether to enable caching explicitly (-dlcm) Choice is based on supplied
CUjit_cacheMode_enum. Option type: unsigned int for enumerated type CUjit_cacheMode_enum
Applies to: compiler only
CU_JIT_NEW_SM3X_OPT = 15
Deprecated This jit option is deprecated and should not be used.
CU_JIT_FAST_COMPILE = 16
This jit option is used for internal purpose only.
CU_JIT_GLOBAL_SYMBOL_NAMES = 17
Array of device symbol names that will be relocated to the corresponding host
addresses stored in CU_JIT_GLOBAL_SYMBOL_ADDRESSES. Must contain
CU_JIT_GLOBAL_SYMBOL_COUNT entries. When loading a device module, driver will
relocate all encountered unresolved symbols to the host addresses. It is only allowed to register
symbols that correspond to unresolved global variables. It is illegal to register the same device
symbol at multiple addresses. Option type: const char ** Applies to: dynamic linker only
CU_JIT_GLOBAL_SYMBOL_ADDRESSES = 18
Array of host addresses that will be used to relocate corresponding device symbols stored in
CU_JIT_GLOBAL_SYMBOL_NAMES. Must contain CU_JIT_GLOBAL_SYMBOL_COUNT
entries. Option type: void ** Applies to: dynamic linker only
CU_JIT_GLOBAL_SYMBOL_COUNT = 19
Number of entries in CU_JIT_GLOBAL_SYMBOL_NAMES and
CU_JIT_GLOBAL_SYMBOL_ADDRESSES arrays. Option type: unsigned int Applies to:
dynamic linker only
CU_JIT_LTO = 20
Deprecated Enable link-time optimization (-dlto) for device code (Disabled by default). This option
is not supported on 32-bit platforms. Option type: int Applies to: compiler and linker Only valid
with LTO-IR compiled with toolkits prior to CUDA 12.0
CU_JIT_FTZ = 21
Deprecated Control single-precision denormals (-ftz) support (0: false, default). 1 : flushes denormal
values to zero 0 : preserves denormal values Option type: int Applies to: link-time optimization
specified with CU_JIT_LTO Only valid with LTO-IR compiled with toolkits prior to CUDA 12.0
CU_JIT_PREC_DIV = 22
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Deprecated Control single-precision floating-point division and reciprocals (-prec-div) support (1:
true, default). 1 : Enables the IEEE round-to-nearest mode 0 : Enables the fast approximation mode
Option type: int Applies to: link-time optimization specified with CU_JIT_LTO Only valid with
LTO-IR compiled with toolkits prior to CUDA 12.0
CU_JIT_PREC_SQRT = 23
Deprecated Control single-precision floating-point square root (-prec-sqrt) support (1: true, default).
1 : Enables the IEEE round-to-nearest mode 0 : Enables the fast approximation mode Option
type: int Applies to: link-time optimization specified with CU_JIT_LTO Only valid with LTO-IR
compiled with toolkits prior to CUDA 12.0
CU_JIT_FMA = 24
Deprecated Enable/Disable the contraction of floating-point multiplies and adds/subtracts into
floating-point multiply-add (-fma) operations (1: Enable, default; 0: Disable). Option type: int
Applies to: link-time optimization specified with CU_JIT_LTO Only valid with LTO-IR compiled
with toolkits prior to CUDA 12.0
CU_JIT_REFERENCED_KERNEL_NAMES = 25
Deprecated Array of kernel names that should be preserved at link time while others can be
removed. Must contain CU_JIT_REFERENCED_KERNEL_COUNT entries. Note that kernel
names can be mangled by the compiler in which case the mangled name needs to be specified.
Wildcard "*" can be used to represent zero or more characters instead of specifying the full or
mangled name. It is important to note that the wildcard "*" is also added implicitly. For example,
specifying "foo" will match "foobaz", "barfoo", "barfoobaz" and thus preserve all kernels with those
names. This can be avoided by providing a more specific name like "barfoobaz". Option type: const
char ** Applies to: dynamic linker only Only valid with LTO-IR compiled with toolkits prior to
CUDA 12.0
CU_JIT_REFERENCED_KERNEL_COUNT = 26
Deprecated Number of entries in CU_JIT_REFERENCED_KERNEL_NAMES array. Option type:
unsigned int Applies to: dynamic linker only Only valid with LTO-IR compiled with toolkits prior
to CUDA 12.0
CU_JIT_REFERENCED_VARIABLE_NAMES = 27
Deprecated Array of variable names (__device__ and/or __constant__) that
should be preserved at link time while others can be removed. Must contain
CU_JIT_REFERENCED_VARIABLE_COUNT entries. Note that variable names can be mangled
by the compiler in which case the mangled name needs to be specified. Wildcard "*" can be used
to represent zero or more characters instead of specifying the full or mangled name. It is important
to note that the wildcard "*" is also added implicitly. For example, specifying "foo" will match
"foobaz", "barfoo", "barfoobaz" and thus preserve all variables with those names. This can be
avoided by providing a more specific name like "barfoobaz". Option type: const char ** Applies to:
link-time optimization specified with CU_JIT_LTO Only valid with LTO-IR compiled with toolkits
prior to CUDA 12.0
CU_JIT_REFERENCED_VARIABLE_COUNT = 28
Deprecated Number of entries in CU_JIT_REFERENCED_VARIABLE_NAMES array. Option
type: unsigned int Applies to: link-time optimization specified with CU_JIT_LTO Only valid with
LTO-IR compiled with toolkits prior to CUDA 12.0
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CU_JIT_OPTIMIZE_UNUSED_DEVICE_VARIABLES = 29
Deprecated This option serves as a hint to enable the JIT compiler/linker to remove constant
(__constant__) and device (__device__) variables unreferenced in device code (Disabled
by default). Note that host references to constant and device variables using APIs like
cuModuleGetGlobal() with this option specified may result in undefined behavior unless the
variables are explicitly specified using CU_JIT_REFERENCED_VARIABLE_NAMES. Option
type: int Applies to: link-time optimization specified with CU_JIT_LTO Only valid with LTO-IR
compiled with toolkits prior to CUDA 12.0
CU_JIT_POSITION_INDEPENDENT_CODE = 30
Generate position independent code (0: false) Option type: int Applies to: compiler only
CU_JIT_MIN_CTA_PER_SM = 31
This option hints to the JIT compiler the minimum number of CTAs from the kernel’s grid to be
mapped to a SM. This option is ignored when used together with CU_JIT_MAX_REGISTERS
or CU_JIT_THREADS_PER_BLOCK. Optimizations based on this option need
CU_JIT_MAX_THREADS_PER_BLOCK to be specified as well. For kernels already
using PTX directive .minnctapersm, this option will be ignored by default. Use
CU_JIT_OVERRIDE_DIRECTIVE_VALUES to let this option take precedence over the PTX
directive. Option type: unsigned int Applies to: compiler only
CU_JIT_MAX_THREADS_PER_BLOCK = 32
Maximum number threads in a thread block, computed as the product of the maximum extent
specifed for each dimension of the block. This limit is guaranteed not to be exeeded in any
invocation of the kernel. Exceeding the the maximum number of threads results in runtime error or
kernel launch failure. For kernels already using PTX directive .maxntid, this option will be ignored
by default. Use CU_JIT_OVERRIDE_DIRECTIVE_VALUES to let this option take precedence
over the PTX directive. Option type: int Applies to: compiler only
CU_JIT_OVERRIDE_DIRECTIVE_VALUES = 33
This option lets the values specified using CU_JIT_MAX_REGISTERS,
CU_JIT_THREADS_PER_BLOCK, CU_JIT_MAX_THREADS_PER_BLOCK and
CU_JIT_MIN_CTA_PER_SM take precedence over any PTX directives. (0: Disable, default; 1:
Enable) Option type: int Applies to: compiler only
CU_JIT_NUM_OPTIONS
enum CUjit_target
Online compilation targets
Values
CU_TARGET_COMPUTE_30 = 30
Compute device class 3.0
CU_TARGET_COMPUTE_32 = 32
Compute device class 3.2
CU_TARGET_COMPUTE_35 = 35
Compute device class 3.5
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CU_TARGET_COMPUTE_37 = 37
Compute device class 3.7
CU_TARGET_COMPUTE_50 = 50
Compute device class 5.0
CU_TARGET_COMPUTE_52 = 52
Compute device class 5.2
CU_TARGET_COMPUTE_53 = 53
Compute device class 5.3
CU_TARGET_COMPUTE_60 = 60
Compute device class 6.0.
CU_TARGET_COMPUTE_61 = 61
Compute device class 6.1.
CU_TARGET_COMPUTE_62 = 62
Compute device class 6.2.
CU_TARGET_COMPUTE_70 = 70
Compute device class 7.0.
CU_TARGET_COMPUTE_72 = 72
Compute device class 7.2.
CU_TARGET_COMPUTE_75 = 75
Compute device class 7.5.
CU_TARGET_COMPUTE_80 = 80
Compute device class 8.0.
CU_TARGET_COMPUTE_86 = 86
Compute device class 8.6.
CU_TARGET_COMPUTE_87 = 87
Compute device class 8.7.
CU_TARGET_COMPUTE_89 = 89
Compute device class 8.9.
CU_TARGET_COMPUTE_90 = 90
Compute device class 9.0.
CU_TARGET_COMPUTE_100 = 100
Compute device class 10.0.
CU_TARGET_COMPUTE_101 = 101
Compute device class 10.1.
CU_TARGET_COMPUTE_103 = 103
Compute device class 10.3.
CU_TARGET_COMPUTE_120 = 120
Compute device class 12.0.
CU_TARGET_COMPUTE_121 = 121
Compute device class 12.1. Compute device class 9.0. with accelerated features.
CU_TARGET_COMPUTE_90A = CU_COMPUTE_ACCELERATED_TARGET_BASE
+CU_TARGET_COMPUTE_90
Compute device class 10.0. with accelerated features.
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CU_TARGET_COMPUTE_100A = CU_COMPUTE_ACCELERATED_TARGET_BASE
+CU_TARGET_COMPUTE_100
Compute device class 10.1 with accelerated features.
CU_TARGET_COMPUTE_101A = CU_COMPUTE_ACCELERATED_TARGET_BASE
+CU_TARGET_COMPUTE_101
Compute device class 10.3. with accelerated features.
CU_TARGET_COMPUTE_103A = CU_COMPUTE_ACCELERATED_TARGET_BASE
+CU_TARGET_COMPUTE_103
Compute device class 12.0. with accelerated features.
CU_TARGET_COMPUTE_120A = CU_COMPUTE_ACCELERATED_TARGET_BASE
+CU_TARGET_COMPUTE_120
Compute device class 12.1. with accelerated features.
CU_TARGET_COMPUTE_121A = CU_COMPUTE_ACCELERATED_TARGET_BASE
+CU_TARGET_COMPUTE_121
Compute device class 10.x with family features.
CU_TARGET_COMPUTE_100F = CU_COMPUTE_FAMILY_TARGET_BASE
+CU_TARGET_COMPUTE_100
Compute device class 10.1 with family features.
CU_TARGET_COMPUTE_101F = CU_COMPUTE_FAMILY_TARGET_BASE
+CU_TARGET_COMPUTE_101
Compute device class 10.3. with family features.
CU_TARGET_COMPUTE_103F = CU_COMPUTE_FAMILY_TARGET_BASE
+CU_TARGET_COMPUTE_103
Compute device class 12.0. with family features.
CU_TARGET_COMPUTE_120F = CU_COMPUTE_FAMILY_TARGET_BASE
+CU_TARGET_COMPUTE_120
Compute device class 12.1. with family features.
CU_TARGET_COMPUTE_121F = CU_COMPUTE_FAMILY_TARGET_BASE
+CU_TARGET_COMPUTE_121
enum CUjitInputType
Device code formats
Values
CU_JIT_INPUT_CUBIN = 0
Compiled device-class-specific device code Applicable options: none
CU_JIT_INPUT_PTX = 1
PTX source code Applicable options: PTX compiler options
CU_JIT_INPUT_FATBINARY = 2
Bundle of multiple cubins and/or PTX of some device code Applicable options: PTX compiler
options, CU_JIT_FALLBACK_STRATEGY
CU_JIT_INPUT_OBJECT = 3
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Host object with embedded device code Applicable options: PTX compiler options,
CU_JIT_FALLBACK_STRATEGY
CU_JIT_INPUT_LIBRARY = 4
Archive of host objects with embedded device code Applicable options: PTX compiler options,
CU_JIT_FALLBACK_STRATEGY
CU_JIT_INPUT_NVVM = 5
Deprecated High-level intermediate code for link-time optimization Applicable options: NVVM
compiler options, PTX compiler options Only valid with LTO-IR compiled with toolkits prior to
CUDA 12.0
CU_JIT_NUM_INPUT_TYPES = 6
enum CUlaunchAttributeID
Launch attributes enum; used as id field of CUlaunchAttribute
Values
CU_LAUNCH_ATTRIBUTE_IGNORE = 0
Ignored entry, for convenient composition
CU_LAUNCH_ATTRIBUTE_ACCESS_POLICY_WINDOW = 1
Valid for streams, graph nodes, launches. See CUlaunchAttributeValue::accessPolicyWindow.
CU_LAUNCH_ATTRIBUTE_COOPERATIVE = 2
Valid for graph nodes, launches. See CUlaunchAttributeValue::cooperative.
CU_LAUNCH_ATTRIBUTE_SYNCHRONIZATION_POLICY = 3
Valid for streams. See CUlaunchAttributeValue::syncPolicy.
CU_LAUNCH_ATTRIBUTE_CLUSTER_DIMENSION = 4
Valid for graph nodes, launches. See CUlaunchAttributeValue::clusterDim.
CU_LAUNCH_ATTRIBUTE_CLUSTER_SCHEDULING_POLICY_PREFERENCE = 5
Valid for graph nodes, launches. See CUlaunchAttributeValue::clusterSchedulingPolicyPreference.
CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_STREAM_SERIALIZATION = 6
Valid for launches. Setting CUlaunchAttributeValue::programmaticStreamSerializationAllowed to
non-0 signals that the kernel will use programmatic means to resolve its stream dependency, so that
the CUDA runtime should opportunistically allow the grid's execution to overlap with the previous
kernel in the stream, if that kernel requests the overlap. The dependent launches can choose to wait
on the dependency using the programmatic sync (cudaGridDependencySynchronize() or equivalent
PTX instructions).
CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_EVENT = 7
Valid for launches. Set CUlaunchAttributeValue::programmaticEvent to record the event.
Event recorded through this launch attribute is guaranteed to only trigger after all block in the
associated kernel trigger the event. A block can trigger the event through PTX launchdep.release
or CUDA builtin function cudaTriggerProgrammaticLaunchCompletion(). A trigger can also
be inserted at the beginning of each block's execution if triggerAtBlockStart is set to non-0.
The dependent launches can choose to wait on the dependency using the programmatic sync
(cudaGridDependencySynchronize() or equivalent PTX instructions). Note that dependents
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(including the CPU thread calling cuEventSynchronize()) are not guaranteed to observe the release
precisely when it is released. For example, cuEventSynchronize() may only observe the event
trigger long after the associated kernel has completed. This recording type is primarily meant for
establishing programmatic dependency between device tasks. Note also this type of dependency
allows, but does not guarantee, concurrent execution of tasks. The event supplied must not be
an interprocess or interop event. The event must disable timing (i.e. must be created with the
CU_EVENT_DISABLE_TIMING flag set).
CU_LAUNCH_ATTRIBUTE_PRIORITY = 8
Valid for streams, graph nodes, launches. See CUlaunchAttributeValue::priority.
CU_LAUNCH_ATTRIBUTE_MEM_SYNC_DOMAIN_MAP = 9
Valid for streams, graph nodes, launches. See CUlaunchAttributeValue::memSyncDomainMap.
CU_LAUNCH_ATTRIBUTE_MEM_SYNC_DOMAIN = 10
Valid for streams, graph nodes, launches. See CUlaunchAttributeValue::memSyncDomain.
CU_LAUNCH_ATTRIBUTE_PREFERRED_CLUSTER_DIMENSION = 11
Valid for graph nodes, launches. Set CUlaunchAttributeValue::preferredClusterDim to allow the
kernel launch to specify a preferred substitute cluster dimension. Blocks may be grouped according
to either the dimensions specified with this attribute (grouped into a "preferred substitute cluster"),
or the one specified with CU_LAUNCH_ATTRIBUTE_CLUSTER_DIMENSION attribute
(grouped into a "regular cluster"). The cluster dimensions of a "preferred substitute cluster" shall
be an integer multiple greater than zero of the regular cluster dimensions. The device will attempt
- on a best-effort basis - to group thread blocks into preferred clusters over grouping them into
regular clusters. When it deems necessary (primarily when the device temporarily runs out of
physical resources to launch the larger preferred clusters), the device may switch to launch the
regular clusters instead to attempt to utilize as much of the physical device resources as possible.
Each type of cluster will have its enumeration / coordinate setup as if the grid consists solely of its
type of cluster. For example, if the preferred substitute cluster dimensions double the regular cluster
dimensions, there might be simultaneously a regular cluster indexed at (1,0,0), and a preferred
cluster indexed at (1,0,0). In this example, the preferred substitute cluster (1,0,0) replaces regular
clusters (2,0,0) and (3,0,0) and groups their blocks. This attribute will only take effect when a
regular cluster dimension has been specified. The preferred substitute cluster dimension must be
an integer multiple greater than zero of the regular cluster dimension and must divide the grid. It
must also be no more than `maxBlocksPerCluster`, if it is set in the kernel's `__launch_bounds__`.
Otherwise it must be less than the maximum value the driver can support. Otherwise, setting this
attribute to a value physically unable to fit on any particular device is permitted.
CU_LAUNCH_ATTRIBUTE_LAUNCH_COMPLETION_EVENT = 12
Valid for launches. Set CUlaunchAttributeValue::launchCompletionEvent to record the
event. Nominally, the event is triggered once all blocks of the kernel have begun execution.
Currently this is a best effort. If a kernel B has a launch completion dependency on a kernel
A, B may wait until A is complete. Alternatively, blocks of B may begin before all blocks
of A have begun, for example if B can claim execution resources unavailable to A (e.g.
they run on different GPUs) or if B is a higher priority than A. Exercise caution if such an
ordering inversion could lead to deadlock. A launch completion event is nominally similar
to a programmatic event with triggerAtBlockStart set except that it is not visible to
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cudaGridDependencySynchronize() and can be used with compute capability less than
9.0. The event supplied must not be an interprocess or interop event. The event must disable timing
(i.e. must be created with the CU_EVENT_DISABLE_TIMING flag set).
CU_LAUNCH_ATTRIBUTE_DEVICE_UPDATABLE_KERNEL_NODE = 13
Valid for graph nodes, launches. This attribute is graphs-only, and
passing it to a launch in a non-capturing stream will result in an error.
CUlaunchAttributeValue::deviceUpdatableKernelNode::deviceUpdatable can
only be set to 0 or 1. Setting the field to 1 indicates that the corresponding kernel
node should be device-updatable. On success, a handle will be returned via
CUlaunchAttributeValue::deviceUpdatableKernelNode::devNode which can be passed to the
various device-side update functions to update the node's kernel parameters from within another
kernel. For more information on the types of device updates that can be made, as well as the
relevant limitations thereof, see cudaGraphKernelNodeUpdatesApply. Nodes which are device-
updatable have additional restrictions compared to regular kernel nodes. Firstly, device-updatable
nodes cannot be removed from their graph via cuGraphDestroyNode. Additionally, once opted-
in to this functionality, a node cannot opt out, and any attempt to set the deviceUpdatable attribute
to 0 will result in an error. Device-updatable kernel nodes also cannot have their attributes copied
to/from another kernel node via cuGraphKernelNodeCopyAttributes. Graphs containing one or
more device-updatable nodes also do not allow multiple instantiation, and neither the graph nor its
instantiated version can be passed to cuGraphExecUpdate. If a graph contains device-updatable
nodes and updates those nodes from the device from within the graph, the graph must be uploaded
with cuGraphUpload before it is launched. For such a graph, if host-side executable graph updates
are made to the device-updatable nodes, the graph must be uploaded before it is launched again.
CU_LAUNCH_ATTRIBUTE_PREFERRED_SHARED_MEMORY_CARVEOUT = 14
Valid for launches. On devices where the L1 cache and shared memory use the same hardware
resources, setting CUlaunchAttributeValue::sharedMemCarveout to a percentage between
0-100 signals the CUDA driver to set the shared memory carveout preference, in percent
of the total shared memory for that kernel launch. This attribute takes precedence over
CU_FUNC_ATTRIBUTE_PREFERRED_SHARED_MEMORY_CARVEOUT. This is only a hint,
and the CUDA driver can choose a different configuration if required for the launch.
enum CUlaunchMemSyncDomain
Memory Synchronization Domain
A kernel can be launched in a specified memory synchronization domain that affects all memory
operations issued by that kernel. A memory barrier issued in one domain will only order memory
operations in that domain, thus eliminating latency increase from memory barriers ordering unrelated
traffic.
By default, kernels are launched in domain 0. Kernel launched with
CU_LAUNCH_MEM_SYNC_DOMAIN_REMOTE will have a different domain ID. User may
also alter the domain ID with CUlaunchMemSyncDomainMap for a specific stream / graph node /
kernel launch. See CU_LAUNCH_ATTRIBUTE_MEM_SYNC_DOMAIN, cuStreamSetAttribute,
cuLaunchKernelEx, cuGraphKernelNodeSetAttribute.
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Memory operations done in kernels launched in different domains are considered system-scope
distanced. In other words, a GPU scoped memory synchronization is not sufficient for memory order to
be observed by kernels in another memory synchronization domain even if they are on the same GPU.
Values
CU_LAUNCH_MEM_SYNC_DOMAIN_DEFAULT = 0
Launch kernels in the default domain
CU_LAUNCH_MEM_SYNC_DOMAIN_REMOTE = 1
Launch kernels in the remote domain
enum CUlibraryOption
Library options to be specified with cuLibraryLoadData() or cuLibraryLoadFromFile()
Values
CU_LIBRARY_HOST_UNIVERSAL_FUNCTION_AND_DATA_TABLE = 0
CU_LIBRARY_BINARY_IS_PRESERVED = 1
Specifes that the argument code passed to cuLibraryLoadData() will be preserved. Specifying this
option will let the driver know that code can be accessed at any point until cuLibraryUnload().
The default behavior is for the driver to allocate and maintain its own copy of code. Note
that this is only a memory usage optimization hint and the driver can choose to ignore it if
required. Specifying this option with cuLibraryLoadFromFile() is invalid and will return
CUDA_ERROR_INVALID_VALUE.
CU_LIBRARY_NUM_OPTIONS
enum CUlimit
Limits
Values
CU_LIMIT_STACK_SIZE = 0x00
GPU thread stack size
CU_LIMIT_PRINTF_FIFO_SIZE = 0x01
GPU printf FIFO size
CU_LIMIT_MALLOC_HEAP_SIZE = 0x02
GPU malloc heap size
CU_LIMIT_DEV_RUNTIME_SYNC_DEPTH = 0x03
GPU device runtime launch synchronize depth
CU_LIMIT_DEV_RUNTIME_PENDING_LAUNCH_COUNT = 0x04
GPU device runtime pending launch count
CU_LIMIT_MAX_L2_FETCH_GRANULARITY = 0x05
A value between 0 and 128 that indicates the maximum fetch granularity of L2 (in Bytes). This is a
hint
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CU_LIMIT_PERSISTING_L2_CACHE_SIZE = 0x06
A size in bytes for L2 persisting lines cache size
CU_LIMIT_SHMEM_SIZE = 0x07
A maximum size in bytes of shared memory available to CUDA kernels on a CIG context. Can only
be queried, cannot be set
CU_LIMIT_CIG_ENABLED = 0x08
A non-zero value indicates this CUDA context is a CIG-enabled context. Can only be queried,
cannot be set
CU_LIMIT_CIG_SHMEM_FALLBACK_ENABLED = 0x09
When set to zero, CUDA will fail to launch a kernel on a CIG context, instead of using the fallback
path, if the kernel uses more shared memory than available
CU_LIMIT_MAX
enum CUmem_advise
Memory advise values
Values
CU_MEM_ADVISE_SET_READ_MOSTLY = 1
Data will mostly be read and only occasionally be written to
CU_MEM_ADVISE_UNSET_READ_MOSTLY = 2
Undo the effect of CU_MEM_ADVISE_SET_READ_MOSTLY
CU_MEM_ADVISE_SET_PREFERRED_LOCATION = 3
Set the preferred location for the data as the specified device
CU_MEM_ADVISE_UNSET_PREFERRED_LOCATION = 4
Clear the preferred location for the data
CU_MEM_ADVISE_SET_ACCESSED_BY = 5
Data will be accessed by the specified device, so prevent page faults as much as possible
CU_MEM_ADVISE_UNSET_ACCESSED_BY = 6
Let the Unified Memory subsystem decide on the page faulting policy for the specified device
enum CUmemAccess_flags
Specifies the memory protection flags for mapping.
Values
CU_MEM_ACCESS_FLAGS_PROT_NONE = 0x0
Default, make the address range not accessible
CU_MEM_ACCESS_FLAGS_PROT_READ = 0x1
Make the address range read accessible
CU_MEM_ACCESS_FLAGS_PROT_READWRITE = 0x3
Make the address range read-write accessible
CU_MEM_ACCESS_FLAGS_PROT_MAX = 0x7FFFFFFF
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enum CUmemAllocationCompType
Specifies compression attribute for an allocation.
Values
CU_MEM_ALLOCATION_COMP_NONE = 0x0
Allocating non-compressible memory
CU_MEM_ALLOCATION_COMP_GENERIC = 0x1
Allocating compressible memory
enum CUmemAllocationGranularity_flags
Flag for requesting different optimal and required granularities for an allocation.
Values
CU_MEM_ALLOC_GRANULARITY_MINIMUM = 0x0
Minimum required granularity for allocation
CU_MEM_ALLOC_GRANULARITY_RECOMMENDED = 0x1
Recommended granularity for allocation for best performance
enum CUmemAllocationHandleType
Flags for specifying particular handle types
Values
CU_MEM_HANDLE_TYPE_NONE = 0x0
Does not allow any export mechanism. >
CU_MEM_HANDLE_TYPE_POSIX_FILE_DESCRIPTOR = 0x1
Allows a file descriptor to be used for exporting. Permitted only on POSIX systems. (int)
CU_MEM_HANDLE_TYPE_WIN32 = 0x2
Allows a Win32 NT handle to be used for exporting. (HANDLE)
CU_MEM_HANDLE_TYPE_WIN32_KMT = 0x4
Allows a Win32 KMT handle to be used for exporting. (D3DKMT_HANDLE)
CU_MEM_HANDLE_TYPE_FABRIC = 0x8
Allows a fabric handle to be used for exporting. (CUmemFabricHandle)
CU_MEM_HANDLE_TYPE_MAX = 0x7FFFFFFF
enum CUmemAllocationType
Defines the allocation types available
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Values
CU_MEM_ALLOCATION_TYPE_INVALID = 0x0
CU_MEM_ALLOCATION_TYPE_PINNED = 0x1
This allocation type is 'pinned', i.e. cannot migrate from its current location while the application is
actively using it
CU_MEM_ALLOCATION_TYPE_MAX = 0x7FFFFFFF
enum CUmemAttach_flags
CUDA Mem Attach Flags
Values
CU_MEM_ATTACH_GLOBAL = 0x1
Memory can be accessed by any stream on any device
CU_MEM_ATTACH_HOST = 0x2
Memory cannot be accessed by any stream on any device
CU_MEM_ATTACH_SINGLE = 0x4
Memory can only be accessed by a single stream on the associated device
enum CUmemcpy3DOperandType
These flags allow applications to convey the operand type for individual copies specified in
cuMemcpy3DBatchAsync.
Values
CU_MEMCPY_OPERAND_TYPE_POINTER = 0x1
Memcpy operand is a valid pointer.
CU_MEMCPY_OPERAND_TYPE_ARRAY = 0x2
Memcpy operand is a CUarray.
CU_MEMCPY_OPERAND_TYPE_MAX = 0x7FFFFFFF
enum CUmemcpyFlags
Flags to specify for copies within a batch. For more details see cuMemcpyBatchAsync.
Values
CU_MEMCPY_FLAG_DEFAULT = 0x0
CU_MEMCPY_FLAG_PREFER_OVERLAP_WITH_COMPUTE = 0x1
Hint to the driver to try and overlap the copy with compute work on the SMs.
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enum CUmemcpySrcAccessOrder
These flags allow applications to convey the source access ordering CUDA must maintain. The
destination will always be accessed in stream order.
Values
CU_MEMCPY_SRC_ACCESS_ORDER_INVALID = 0x0
Default invalid.
CU_MEMCPY_SRC_ACCESS_ORDER_STREAM = 0x1
Indicates that access to the source pointer must be in stream order.
CU_MEMCPY_SRC_ACCESS_ORDER_DURING_API_CALL = 0x2
Indicates that access to the source pointer can be out of stream order and all accesses must be
complete before the API call returns. This flag is suited for ephemeral sources (ex., stack variables)
when it's known that no prior operations in the stream can be accessing the memory and also
that the lifetime of the memory is limited to the scope that the source variable was declared in.
Specifying this flag allows the driver to optimize the copy and removes the need for the user to
synchronize the stream after the API call.
CU_MEMCPY_SRC_ACCESS_ORDER_ANY = 0x3
Indicates that access to the source pointer can be out of stream order and the accesses can happen
even after the API call returns. This flag is suited for host pointers allocated outside CUDA (ex.,
via malloc) when it's known that no prior operations in the stream can be accessing the memory.
Specifying this flag allows the driver to optimize the copy on certain platforms.
CU_MEMCPY_SRC_ACCESS_ORDER_MAX = 0x7FFFFFFF
enum CUmemHandleType
Memory handle types
Values
CU_MEM_HANDLE_TYPE_GENERIC = 0
enum CUmemLocationType
Specifies the type of location
Values
CU_MEM_LOCATION_TYPE_INVALID = 0x0
CU_MEM_LOCATION_TYPE_DEVICE = 0x1
Location is a device location, thus id is a device ordinal
CU_MEM_LOCATION_TYPE_HOST = 0x2
Location is host, id is ignored
CU_MEM_LOCATION_TYPE_HOST_NUMA = 0x3
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Location is a host NUMA node, thus id is a host NUMA node id
CU_MEM_LOCATION_TYPE_HOST_NUMA_CURRENT = 0x4
Location is a host NUMA node of the current thread, id is ignored
CU_MEM_LOCATION_TYPE_MAX = 0x7FFFFFFF
enum CUmemOperationType
Memory operation types
Values
CU_MEM_OPERATION_TYPE_MAP = 1
CU_MEM_OPERATION_TYPE_UNMAP = 2
enum CUmemorytype
Memory types
Values
CU_MEMORYTYPE_HOST = 0x01
Host memory
CU_MEMORYTYPE_DEVICE = 0x02
Device memory
CU_MEMORYTYPE_ARRAY = 0x03
Array memory
CU_MEMORYTYPE_UNIFIED = 0x04
Unified device or host memory
enum CUmemPool_attribute
CUDA memory pool attributes
Values
CU_MEMPOOL_ATTR_REUSE_FOLLOW_EVENT_DEPENDENCIES = 1
(value type = int) Allow cuMemAllocAsync to use memory asynchronously freed in another
streams as long as a stream ordering dependency of the allocating stream on the free action exists.
Cuda events and null stream interactions can create the required stream ordered dependencies.
(default enabled)
CU_MEMPOOL_ATTR_REUSE_ALLOW_OPPORTUNISTIC
(value type = int) Allow reuse of already completed frees when there is no dependency between the
free and allocation. (default enabled)
CU_MEMPOOL_ATTR_REUSE_ALLOW_INTERNAL_DEPENDENCIES
(value type = int) Allow cuMemAllocAsync to insert new stream dependencies in order to establish
the stream ordering required to reuse a piece of memory released by cuFreeAsync (default enabled).
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CU_MEMPOOL_ATTR_RELEASE_THRESHOLD
(value type = cuuint64_t) Amount of reserved memory in bytes to hold onto before trying to release
memory back to the OS. When more than the release threshold bytes of memory are held by the
memory pool, the allocator will try to release memory back to the OS on the next call to stream,
event or context synchronize. (default 0)
CU_MEMPOOL_ATTR_RESERVED_MEM_CURRENT
(value type = cuuint64_t) Amount of backing memory currently allocated for the mempool.
CU_MEMPOOL_ATTR_RESERVED_MEM_HIGH
(value type = cuuint64_t) High watermark of backing memory allocated for the mempool since the
last time it was reset. High watermark can only be reset to zero.
CU_MEMPOOL_ATTR_USED_MEM_CURRENT
(value type = cuuint64_t) Amount of memory from the pool that is currently in use by the
application.
CU_MEMPOOL_ATTR_USED_MEM_HIGH
(value type = cuuint64_t) High watermark of the amount of memory from the pool that was in use
by the application since the last time it was reset. High watermark can only be reset to zero.
enum CUmemRangeFlags
Flag for requesting handle type for address range.
Values
CU_MEM_RANGE_FLAG_DMA_BUF_MAPPING_TYPE_PCIE = 0x1
Indicates that DMA_BUF handle should be mapped via PCIe BAR1
enum CUmemRangeHandleType
Specifies the handle type for address range
Values
CU_MEM_RANGE_HANDLE_TYPE_DMA_BUF_FD = 0x1
CU_MEM_RANGE_HANDLE_TYPE_MAX = 0x7FFFFFFF
enum CUmulticastGranularity_flags
Flags for querying different granularities for a multicast object
Values
CU_MULTICAST_GRANULARITY_MINIMUM = 0x0
Minimum required granularity
CU_MULTICAST_GRANULARITY_RECOMMENDED = 0x1
Recommended granularity for best performance
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enum CUoccupancy_flags
Occupancy calculator flag
Values
CU_OCCUPANCY_DEFAULT = 0x0
Default behavior
CU_OCCUPANCY_DISABLE_CACHING_OVERRIDE = 0x1
Assume global caching is enabled and cannot be automatically turned off
enum CUpointer_attribute
Pointer information
Values
CU_POINTER_ATTRIBUTE_CONTEXT = 1
The CUcontext on which a pointer was allocated or registered
CU_POINTER_ATTRIBUTE_MEMORY_TYPE = 2
The CUmemorytype describing the physical location of a pointer
CU_POINTER_ATTRIBUTE_DEVICE_POINTER = 3
The address at which a pointer's memory may be accessed on the device
CU_POINTER_ATTRIBUTE_HOST_POINTER = 4
The address at which a pointer's memory may be accessed on the host
CU_POINTER_ATTRIBUTE_P2P_TOKENS = 5
A pair of tokens for use with the nv-p2p.h Linux kernel interface
CU_POINTER_ATTRIBUTE_SYNC_MEMOPS = 6
Synchronize every synchronous memory operation initiated on this region
CU_POINTER_ATTRIBUTE_BUFFER_ID = 7
A process-wide unique ID for an allocated memory region
CU_POINTER_ATTRIBUTE_IS_MANAGED = 8
Indicates if the pointer points to managed memory
CU_POINTER_ATTRIBUTE_DEVICE_ORDINAL = 9
A device ordinal of a device on which a pointer was allocated or registered
CU_POINTER_ATTRIBUTE_IS_LEGACY_CUDA_IPC_CAPABLE = 10
1 if this pointer maps to an allocation that is suitable for cudaIpcGetMemHandle, 0 otherwise
CU_POINTER_ATTRIBUTE_RANGE_START_ADDR = 11
Starting address for this requested pointer
CU_POINTER_ATTRIBUTE_RANGE_SIZE = 12
Size of the address range for this requested pointer
CU_POINTER_ATTRIBUTE_MAPPED = 13
1 if this pointer is in a valid address range that is mapped to a backing allocation, 0 otherwise
CU_POINTER_ATTRIBUTE_ALLOWED_HANDLE_TYPES = 14
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Bitmask of allowed CUmemAllocationHandleType for this allocation
CU_POINTER_ATTRIBUTE_IS_GPU_DIRECT_RDMA_CAPABLE = 15
1 if the memory this pointer is referencing can be used with the GPUDirect RDMA API
CU_POINTER_ATTRIBUTE_ACCESS_FLAGS = 16
Returns the access flags the device associated with the current context has on the corresponding
memory referenced by the pointer given
CU_POINTER_ATTRIBUTE_MEMPOOL_HANDLE = 17
Returns the mempool handle for the allocation if it was allocated from a mempool. Otherwise
returns NULL.
CU_POINTER_ATTRIBUTE_MAPPING_SIZE = 18
Size of the actual underlying mapping that the pointer belongs to
CU_POINTER_ATTRIBUTE_MAPPING_BASE_ADDR = 19
The start address of the mapping that the pointer belongs to
CU_POINTER_ATTRIBUTE_MEMORY_BLOCK_ID = 20
A process-wide unique id corresponding to the physical allocation the pointer belongs to
CU_POINTER_ATTRIBUTE_IS_HW_DECOMPRESS_CAPABLE = 21
Returns in *data a boolean that indicates whether the pointer points to memory that is capable to
be used for hardware accelerated decompression.
enum CUprocessState
CUDA Process States
Values
CU_PROCESS_STATE_RUNNING = 0
Default process state
CU_PROCESS_STATE_LOCKED
CUDA API locks are taken so further CUDA API calls will block
CU_PROCESS_STATE_CHECKPOINTED
Application memory contents have been checkpointed and underlying allocations and device
handles have been released
CU_PROCESS_STATE_FAILED
Application entered an uncorrectable error during the checkpoint/restore process
enum CUresourcetype
Resource types
Values
CU_RESOURCE_TYPE_ARRAY = 0x00
Array resource
CU_RESOURCE_TYPE_MIPMAPPED_ARRAY = 0x01
Mipmapped array resource
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CU_RESOURCE_TYPE_LINEAR = 0x02
Linear resource
CU_RESOURCE_TYPE_PITCH2D = 0x03
Pitch 2D resource
enum CUresourceViewFormat
Resource view format
Values
CU_RES_VIEW_FORMAT_NONE = 0x00
No resource view format (use underlying resource format)
CU_RES_VIEW_FORMAT_UINT_1X8 = 0x01
1 channel unsigned 8-bit integers
CU_RES_VIEW_FORMAT_UINT_2X8 = 0x02
2 channel unsigned 8-bit integers
CU_RES_VIEW_FORMAT_UINT_4X8 = 0x03
4 channel unsigned 8-bit integers
CU_RES_VIEW_FORMAT_SINT_1X8 = 0x04
1 channel signed 8-bit integers
CU_RES_VIEW_FORMAT_SINT_2X8 = 0x05
2 channel signed 8-bit integers
CU_RES_VIEW_FORMAT_SINT_4X8 = 0x06
4 channel signed 8-bit integers
CU_RES_VIEW_FORMAT_UINT_1X16 = 0x07
1 channel unsigned 16-bit integers
CU_RES_VIEW_FORMAT_UINT_2X16 = 0x08
2 channel unsigned 16-bit integers
CU_RES_VIEW_FORMAT_UINT_4X16 = 0x09
4 channel unsigned 16-bit integers
CU_RES_VIEW_FORMAT_SINT_1X16 = 0x0a
1 channel signed 16-bit integers
CU_RES_VIEW_FORMAT_SINT_2X16 = 0x0b
2 channel signed 16-bit integers
CU_RES_VIEW_FORMAT_SINT_4X16 = 0x0c
4 channel signed 16-bit integers
CU_RES_VIEW_FORMAT_UINT_1X32 = 0x0d
1 channel unsigned 32-bit integers
CU_RES_VIEW_FORMAT_UINT_2X32 = 0x0e
2 channel unsigned 32-bit integers
CU_RES_VIEW_FORMAT_UINT_4X32 = 0x0f
4 channel unsigned 32-bit integers
CU_RES_VIEW_FORMAT_SINT_1X32 = 0x10
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1 channel signed 32-bit integers
CU_RES_VIEW_FORMAT_SINT_2X32 = 0x11
2 channel signed 32-bit integers
CU_RES_VIEW_FORMAT_SINT_4X32 = 0x12
4 channel signed 32-bit integers
CU_RES_VIEW_FORMAT_FLOAT_1X16 = 0x13
1 channel 16-bit floating point
CU_RES_VIEW_FORMAT_FLOAT_2X16 = 0x14
2 channel 16-bit floating point
CU_RES_VIEW_FORMAT_FLOAT_4X16 = 0x15
4 channel 16-bit floating point
CU_RES_VIEW_FORMAT_FLOAT_1X32 = 0x16
1 channel 32-bit floating point
CU_RES_VIEW_FORMAT_FLOAT_2X32 = 0x17
2 channel 32-bit floating point
CU_RES_VIEW_FORMAT_FLOAT_4X32 = 0x18
4 channel 32-bit floating point
CU_RES_VIEW_FORMAT_UNSIGNED_BC1 = 0x19
Block compressed 1
CU_RES_VIEW_FORMAT_UNSIGNED_BC2 = 0x1a
Block compressed 2
CU_RES_VIEW_FORMAT_UNSIGNED_BC3 = 0x1b
Block compressed 3
CU_RES_VIEW_FORMAT_UNSIGNED_BC4 = 0x1c
Block compressed 4 unsigned
CU_RES_VIEW_FORMAT_SIGNED_BC4 = 0x1d
Block compressed 4 signed
CU_RES_VIEW_FORMAT_UNSIGNED_BC5 = 0x1e
Block compressed 5 unsigned
CU_RES_VIEW_FORMAT_SIGNED_BC5 = 0x1f
Block compressed 5 signed
CU_RES_VIEW_FORMAT_UNSIGNED_BC6H = 0x20
Block compressed 6 unsigned half-float
CU_RES_VIEW_FORMAT_SIGNED_BC6H = 0x21
Block compressed 6 signed half-float
CU_RES_VIEW_FORMAT_UNSIGNED_BC7 = 0x22
Block compressed 7
enum CUresult
Error codes
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Values
CUDA_SUCCESS = 0
The API call returned with no errors. In the case of query calls, this also means that the operation
being queried is complete (see cuEventQuery() and cuStreamQuery()).
CUDA_ERROR_INVALID_VALUE = 1
This indicates that one or more of the parameters passed to the API call is not within an acceptable
range of values.
CUDA_ERROR_OUT_OF_MEMORY = 2
The API call failed because it was unable to allocate enough memory or other resources to perform
the requested operation.
CUDA_ERROR_NOT_INITIALIZED = 3
This indicates that the CUDA driver has not been initialized with cuInit() or that initialization has
failed.
CUDA_ERROR_DEINITIALIZED = 4
This indicates that the CUDA driver is in the process of shutting down.
CUDA_ERROR_PROFILER_DISABLED = 5
This indicates profiler is not initialized for this run. This can happen when the application is running
with external profiling tools like visual profiler.
CUDA_ERROR_PROFILER_NOT_INITIALIZED = 6
Deprecated This error return is deprecated as of CUDA 5.0. It is no longer an error to attempt to
enable/disable the profiling via cuProfilerStart or cuProfilerStop without initialization.
CUDA_ERROR_PROFILER_ALREADY_STARTED = 7
Deprecated This error return is deprecated as of CUDA 5.0. It is no longer an error to call
cuProfilerStart() when profiling is already enabled.
CUDA_ERROR_PROFILER_ALREADY_STOPPED = 8
Deprecated This error return is deprecated as of CUDA 5.0. It is no longer an error to call
cuProfilerStop() when profiling is already disabled.
CUDA_ERROR_STUB_LIBRARY = 34
This indicates that the CUDA driver that the application has loaded is a stub library. Applications
that run with the stub rather than a real driver loaded will result in CUDA API returning this error.
CUDA_ERROR_DEVICE_UNAVAILABLE = 46
This indicates that requested CUDA device is unavailable at the current time. Devices
are often unavailable due to use of CU_COMPUTEMODE_EXCLUSIVE_PROCESS or
CU_COMPUTEMODE_PROHIBITED.
CUDA_ERROR_NO_DEVICE = 100
This indicates that no CUDA-capable devices were detected by the installed CUDA driver.
CUDA_ERROR_INVALID_DEVICE = 101
This indicates that the device ordinal supplied by the user does not correspond to a valid CUDA
device or that the action requested is invalid for the specified device.
CUDA_ERROR_DEVICE_NOT_LICENSED = 102
This error indicates that the Grid license is not applied.
CUDA_ERROR_INVALID_IMAGE = 200
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This indicates that the device kernel image is invalid. This can also indicate an invalid CUDA
module.
CUDA_ERROR_INVALID_CONTEXT = 201
This most frequently indicates that there is no context bound to the current thread. This can also
be returned if the context passed to an API call is not a valid handle (such as a context that has had
cuCtxDestroy() invoked on it). This can also be returned if a user mixes different API versions
(i.e. 3010 context with 3020 API calls). See cuCtxGetApiVersion() for more details. This can also
be returned if the green context passed to an API call was not converted to a CUcontext using
cuCtxFromGreenCtx API.
CUDA_ERROR_CONTEXT_ALREADY_CURRENT = 202
This indicated that the context being supplied as a parameter to the API call was already the active
context. Deprecated This error return is deprecated as of CUDA 3.2. It is no longer an error to
attempt to push the active context via cuCtxPushCurrent().
CUDA_ERROR_MAP_FAILED = 205
This indicates that a map or register operation has failed.
CUDA_ERROR_UNMAP_FAILED = 206
This indicates that an unmap or unregister operation has failed.
CUDA_ERROR_ARRAY_IS_MAPPED = 207
This indicates that the specified array is currently mapped and thus cannot be destroyed.
CUDA_ERROR_ALREADY_MAPPED = 208
This indicates that the resource is already mapped.
CUDA_ERROR_NO_BINARY_FOR_GPU = 209
This indicates that there is no kernel image available that is suitable for the device. This can occur
when a user specifies code generation options for a particular CUDA source file that do not include
the corresponding device configuration.
CUDA_ERROR_ALREADY_ACQUIRED = 210
This indicates that a resource has already been acquired.
CUDA_ERROR_NOT_MAPPED = 211
This indicates that a resource is not mapped.
CUDA_ERROR_NOT_MAPPED_AS_ARRAY = 212
This indicates that a mapped resource is not available for access as an array.
CUDA_ERROR_NOT_MAPPED_AS_POINTER = 213
This indicates that a mapped resource is not available for access as a pointer.
CUDA_ERROR_ECC_UNCORRECTABLE = 214
This indicates that an uncorrectable ECC error was detected during execution.
CUDA_ERROR_UNSUPPORTED_LIMIT = 215
This indicates that the CUlimit passed to the API call is not supported by the active device.
CUDA_ERROR_CONTEXT_ALREADY_IN_USE = 216
This indicates that the CUcontext passed to the API call can only be bound to a single CPU thread at
a time but is already bound to a CPU thread.
CUDA_ERROR_PEER_ACCESS_UNSUPPORTED = 217
This indicates that peer access is not supported across the given devices.
CUDA_ERROR_INVALID_PTX = 218
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This indicates that a PTX JIT compilation failed.
CUDA_ERROR_INVALID_GRAPHICS_CONTEXT = 219
This indicates an error with OpenGL or DirectX context.
CUDA_ERROR_NVLINK_UNCORRECTABLE = 220
This indicates that an uncorrectable NVLink error was detected during the execution.
CUDA_ERROR_JIT_COMPILER_NOT_FOUND = 221
This indicates that the PTX JIT compiler library was not found.
CUDA_ERROR_UNSUPPORTED_PTX_VERSION = 222
This indicates that the provided PTX was compiled with an unsupported toolchain.
CUDA_ERROR_JIT_COMPILATION_DISABLED = 223
This indicates that the PTX JIT compilation was disabled.
CUDA_ERROR_UNSUPPORTED_EXEC_AFFINITY = 224
This indicates that the CUexecAffinityType passed to the API call is not supported by the active
device.
CUDA_ERROR_UNSUPPORTED_DEVSIDE_SYNC = 225
This indicates that the code to be compiled by the PTX JIT contains unsupported call to
cudaDeviceSynchronize.
CUDA_ERROR_CONTAINED = 226
This indicates that an exception occurred on the device that is now contained by the GPU's error
containment capability. Common causes are - a. Certain types of invalid accesses of peer GPU
memory over nvlink b. Certain classes of hardware errors This leaves the process in an inconsistent
state and any further CUDA work will return the same error. To continue using CUDA, the process
must be terminated and relaunched.
CUDA_ERROR_INVALID_SOURCE = 300
This indicates that the device kernel source is invalid. This includes compilation/linker errors
encountered in device code or user error.
CUDA_ERROR_FILE_NOT_FOUND = 301
This indicates that the file specified was not found.
CUDA_ERROR_SHARED_OBJECT_SYMBOL_NOT_FOUND = 302
This indicates that a link to a shared object failed to resolve.
CUDA_ERROR_SHARED_OBJECT_INIT_FAILED = 303
This indicates that initialization of a shared object failed.
CUDA_ERROR_OPERATING_SYSTEM = 304
This indicates that an OS call failed.
CUDA_ERROR_INVALID_HANDLE = 400
This indicates that a resource handle passed to the API call was not valid. Resource handles are
opaque types like CUstream and CUevent.
CUDA_ERROR_ILLEGAL_STATE = 401
This indicates that a resource required by the API call is not in a valid state to perform the requested
operation.
CUDA_ERROR_LOSSY_QUERY = 402
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This indicates an attempt was made to introspect an object in a way that would discard semantically
important information. This is either due to the object using funtionality newer than the API version
used to introspect it or omission of optional return arguments.
CUDA_ERROR_NOT_FOUND = 500
This indicates that a named symbol was not found. Examples of symbols are global/constant
variable names, driver function names, texture names, and surface names.
CUDA_ERROR_NOT_READY = 600
This indicates that asynchronous operations issued previously have not completed yet. This result
is not actually an error, but must be indicated differently than CUDA_SUCCESS (which indicates
completion). Calls that may return this value include cuEventQuery() and cuStreamQuery().
CUDA_ERROR_ILLEGAL_ADDRESS = 700
While executing a kernel, the device encountered a load or store instruction on an invalid memory
address. This leaves the process in an inconsistent state and any further CUDA work will return the
same error. To continue using CUDA, the process must be terminated and relaunched.
CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES = 701
This indicates that a launch did not occur because it did not have appropriate resources. This error
usually indicates that the user has attempted to pass too many arguments to the device kernel, or
the kernel launch specifies too many threads for the kernel's register count. Passing arguments of
the wrong size (i.e. a 64-bit pointer when a 32-bit int is expected) is equivalent to passing too many
arguments and can also result in this error.
CUDA_ERROR_LAUNCH_TIMEOUT = 702
This indicates that the device kernel took too long to execute. This can only occur if timeouts are
enabled - see the device attribute CU_DEVICE_ATTRIBUTE_KERNEL_EXEC_TIMEOUT for
more information. This leaves the process in an inconsistent state and any further CUDA work will
return the same error. To continue using CUDA, the process must be terminated and relaunched.
CUDA_ERROR_LAUNCH_INCOMPATIBLE_TEXTURING = 703
This error indicates a kernel launch that uses an incompatible texturing mode.
CUDA_ERROR_PEER_ACCESS_ALREADY_ENABLED = 704
This error indicates that a call to cuCtxEnablePeerAccess() is trying to re-enable peer access to a
context which has already had peer access to it enabled.
CUDA_ERROR_PEER_ACCESS_NOT_ENABLED = 705
This error indicates that cuCtxDisablePeerAccess() is trying to disable peer access which has not
been enabled yet via cuCtxEnablePeerAccess().
CUDA_ERROR_PRIMARY_CONTEXT_ACTIVE = 708
This error indicates that the primary context for the specified device has already been initialized.
CUDA_ERROR_CONTEXT_IS_DESTROYED = 709
This error indicates that the context current to the calling thread has been destroyed using
cuCtxDestroy, or is a primary context which has not yet been initialized.
CUDA_ERROR_ASSERT = 710
A device-side assert triggered during kernel execution. The context cannot be used anymore, and
must be destroyed. All existing device memory allocations from this context are invalid and must be
reconstructed if the program is to continue using CUDA.
CUDA_ERROR_TOO_MANY_PEERS = 711
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This error indicates that the hardware resources required to enable peer access have been exhausted
for one or more of the devices passed to cuCtxEnablePeerAccess().
CUDA_ERROR_HOST_MEMORY_ALREADY_REGISTERED = 712
This error indicates that the memory range passed to cuMemHostRegister() has already been
registered.
CUDA_ERROR_HOST_MEMORY_NOT_REGISTERED = 713
This error indicates that the pointer passed to cuMemHostUnregister() does not correspond to any
currently registered memory region.
CUDA_ERROR_HARDWARE_STACK_ERROR = 714
While executing a kernel, the device encountered a stack error. This can be due to stack corruption
or exceeding the stack size limit. This leaves the process in an inconsistent state and any further
CUDA work will return the same error. To continue using CUDA, the process must be terminated
and relaunched.
CUDA_ERROR_ILLEGAL_INSTRUCTION = 715
While executing a kernel, the device encountered an illegal instruction. This leaves the process in an
inconsistent state and any further CUDA work will return the same error. To continue using CUDA,
the process must be terminated and relaunched.
CUDA_ERROR_MISALIGNED_ADDRESS = 716
While executing a kernel, the device encountered a load or store instruction on a memory address
which is not aligned. This leaves the process in an inconsistent state and any further CUDA
work will return the same error. To continue using CUDA, the process must be terminated and
relaunched.
CUDA_ERROR_INVALID_ADDRESS_SPACE = 717
While executing a kernel, the device encountered an instruction which can only operate on memory
locations in certain address spaces (global, shared, or local), but was supplied a memory address
not belonging to an allowed address space. This leaves the process in an inconsistent state and any
further CUDA work will return the same error. To continue using CUDA, the process must be
terminated and relaunched.
CUDA_ERROR_INVALID_PC = 718
While executing a kernel, the device program counter wrapped its address space. This leaves the
process in an inconsistent state and any further CUDA work will return the same error. To continue
using CUDA, the process must be terminated and relaunched.
CUDA_ERROR_LAUNCH_FAILED = 719
An exception occurred on the device while executing a kernel. Common causes include
dereferencing an invalid device pointer and accessing out of bounds shared memory. Less common
cases can be system specific - more information about these cases can be found in the system
specific user guide. This leaves the process in an inconsistent state and any further CUDA work will
return the same error. To continue using CUDA, the process must be terminated and relaunched.
CUDA_ERROR_COOPERATIVE_LAUNCH_TOO_LARGE = 720
This error indicates that the number of blocks launched per grid for a kernel that was launched
via either cuLaunchCooperativeKernel or cuLaunchCooperativeKernelMultiDevice exceeds the
maximum number of blocks as allowed by cuOccupancyMaxActiveBlocksPerMultiprocessor or
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cuOccupancyMaxActiveBlocksPerMultiprocessorWithFlags times the number of multiprocessors as
specified by the device attribute CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT.
CUDA_ERROR_TENSOR_MEMORY_LEAK = 721
An exception occurred on the device while exiting a kernel using tensor memory: the tensor
memory was not completely deallocated. This leaves the process in an inconsistent state and any
further CUDA work will return the same error. To continue using CUDA, the process must be
terminated and relaunched.
CUDA_ERROR_NOT_PERMITTED = 800
This error indicates that the attempted operation is not permitted.
CUDA_ERROR_NOT_SUPPORTED = 801
This error indicates that the attempted operation is not supported on the current system or device.
CUDA_ERROR_SYSTEM_NOT_READY = 802
This error indicates that the system is not yet ready to start any CUDA work. To continue using
CUDA, verify the system configuration is in a valid state and all required driver daemons are
actively running. More information about this error can be found in the system specific user guide.
CUDA_ERROR_SYSTEM_DRIVER_MISMATCH = 803
This error indicates that there is a mismatch between the versions of the display driver and the
CUDA driver. Refer to the compatibility documentation for supported versions.
CUDA_ERROR_COMPAT_NOT_SUPPORTED_ON_DEVICE = 804
This error indicates that the system was upgraded to run with forward compatibility but the visible
hardware detected by CUDA does not support this configuration. Refer to the compatibility
documentation for the supported hardware matrix or ensure that only supported hardware is visible
during initialization via the CUDA_VISIBLE_DEVICES environment variable.
CUDA_ERROR_MPS_CONNECTION_FAILED = 805
This error indicates that the MPS client failed to connect to the MPS control daemon or the MPS
server.
CUDA_ERROR_MPS_RPC_FAILURE = 806
This error indicates that the remote procedural call between the MPS server and the MPS client
failed.
CUDA_ERROR_MPS_SERVER_NOT_READY = 807
This error indicates that the MPS server is not ready to accept new MPS client requests. This error
can be returned when the MPS server is in the process of recovering from a fatal failure.
CUDA_ERROR_MPS_MAX_CLIENTS_REACHED = 808
This error indicates that the hardware resources required to create MPS client have been exhausted.
CUDA_ERROR_MPS_MAX_CONNECTIONS_REACHED = 809
This error indicates the the hardware resources required to support device connections have been
exhausted.
CUDA_ERROR_MPS_CLIENT_TERMINATED = 810
This error indicates that the MPS client has been terminated by the server. To continue using
CUDA, the process must be terminated and relaunched.
CUDA_ERROR_CDP_NOT_SUPPORTED = 811
This error indicates that the module is using CUDA Dynamic Parallelism, but the current
configuration, like MPS, does not support it.
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CUDA_ERROR_CDP_VERSION_MISMATCH = 812
This error indicates that a module contains an unsupported interaction between different versions of
CUDA Dynamic Parallelism.
CUDA_ERROR_STREAM_CAPTURE_UNSUPPORTED = 900
This error indicates that the operation is not permitted when the stream is capturing.
CUDA_ERROR_STREAM_CAPTURE_INVALIDATED = 901
This error indicates that the current capture sequence on the stream has been invalidated due to a
previous error.
CUDA_ERROR_STREAM_CAPTURE_MERGE = 902
This error indicates that the operation would have resulted in a merge of two independent capture
sequences.
CUDA_ERROR_STREAM_CAPTURE_UNMATCHED = 903
This error indicates that the capture was not initiated in this stream.
CUDA_ERROR_STREAM_CAPTURE_UNJOINED = 904
This error indicates that the capture sequence contains a fork that was not joined to the primary
stream.
CUDA_ERROR_STREAM_CAPTURE_ISOLATION = 905
This error indicates that a dependency would have been created which crosses the capture sequence
boundary. Only implicit in-stream ordering dependencies are allowed to cross the boundary.
CUDA_ERROR_STREAM_CAPTURE_IMPLICIT = 906
This error indicates a disallowed implicit dependency on a current capture sequence from
cudaStreamLegacy.
CUDA_ERROR_CAPTURED_EVENT = 907
This error indicates that the operation is not permitted on an event which was last recorded in a
capturing stream.
CUDA_ERROR_STREAM_CAPTURE_WRONG_THREAD = 908
A stream capture sequence not initiated with the CU_STREAM_CAPTURE_MODE_RELAXED
argument to cuStreamBeginCapture was passed to cuStreamEndCapture in a different thread.
CUDA_ERROR_TIMEOUT = 909
This error indicates that the timeout specified for the wait operation has lapsed.
CUDA_ERROR_GRAPH_EXEC_UPDATE_FAILURE = 910
This error indicates that the graph update was not performed because it included changes which
violated constraints specific to instantiated graph update.
CUDA_ERROR_EXTERNAL_DEVICE = 911
This indicates that an async error has occurred in a device outside of CUDA. If CUDA was waiting
for an external device's signal before consuming shared data, the external device signaled an error
indicating that the data is not valid for consumption. This leaves the process in an inconsistent state
and any further CUDA work will return the same error. To continue using CUDA, the process must
be terminated and relaunched.
CUDA_ERROR_INVALID_CLUSTER_SIZE = 912
Indicates a kernel launch error due to cluster misconfiguration.
CUDA_ERROR_FUNCTION_NOT_LOADED = 913
Indiciates a function handle is not loaded when calling an API that requires a loaded function.
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CUDA_ERROR_INVALID_RESOURCE_TYPE = 914
This error indicates one or more resources passed in are not valid resource types for the operation.
CUDA_ERROR_INVALID_RESOURCE_CONFIGURATION = 915
This error indicates one or more resources are insufficient or non-applicable for the operation.
CUDA_ERROR_KEY_ROTATION = 916
This error indicates that an error happened during the key rotation sequence.
CUDA_ERROR_UNKNOWN = 999
This indicates that an unknown internal error has occurred.
enum CUshared_carveout
Shared memory carveout configurations. These may be passed to cuFuncSetAttribute or
cuKernelSetAttribute
Values
CU_SHAREDMEM_CARVEOUT_DEFAULT = -1
No preference for shared memory or L1 (default)
CU_SHAREDMEM_CARVEOUT_MAX_SHARED = 100
Prefer maximum available shared memory, minimum L1 cache
CU_SHAREDMEM_CARVEOUT_MAX_L1 = 0
Prefer maximum available L1 cache, minimum shared memory
enum CUsharedconfig
Deprecated
Shared memory configurations
Values
CU_SHARED_MEM_CONFIG_DEFAULT_BANK_SIZE = 0x00
set default shared memory bank size
CU_SHARED_MEM_CONFIG_FOUR_BYTE_BANK_SIZE = 0x01
set shared memory bank width to four bytes
CU_SHARED_MEM_CONFIG_EIGHT_BYTE_BANK_SIZE = 0x02
set shared memory bank width to eight bytes
enum CUstream_flags
Stream creation flags
Values
CU_STREAM_DEFAULT = 0x0
Default stream flag
CU_STREAM_NON_BLOCKING = 0x1
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Stream does not synchronize with stream 0 (the NULL stream)
enum CUstreamBatchMemOpType
Operations for cuStreamBatchMemOp
Values
CU_STREAM_MEM_OP_WAIT_VALUE_32 = 1
Represents a cuStreamWaitValue32 operation
CU_STREAM_MEM_OP_WRITE_VALUE_32 = 2
Represents a cuStreamWriteValue32 operation
CU_STREAM_MEM_OP_WAIT_VALUE_64 = 4
Represents a cuStreamWaitValue64 operation
CU_STREAM_MEM_OP_WRITE_VALUE_64 = 5
Represents a cuStreamWriteValue64 operation
CU_STREAM_MEM_OP_BARRIER = 6
Insert a memory barrier of the specified type
CU_STREAM_MEM_OP_FLUSH_REMOTE_WRITES = 3
This has the same effect as CU_STREAM_WAIT_VALUE_FLUSH, but as a standalone operation.
enum CUstreamCaptureMode
Possible modes for stream capture thread interactions. For more details see cuStreamBeginCapture and
cuThreadExchangeStreamCaptureMode
Values
CU_STREAM_CAPTURE_MODE_GLOBAL = 0
CU_STREAM_CAPTURE_MODE_THREAD_LOCAL = 1
CU_STREAM_CAPTURE_MODE_RELAXED = 2
enum CUstreamCaptureStatus
Possible stream capture statuses returned by cuStreamIsCapturing
Values
CU_STREAM_CAPTURE_STATUS_NONE = 0
Stream is not capturing
CU_STREAM_CAPTURE_STATUS_ACTIVE = 1
Stream is actively capturing
CU_STREAM_CAPTURE_STATUS_INVALIDATED = 2
Stream is part of a capture sequence that has been invalidated, but not terminated
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enum CUstreamMemoryBarrier_flags
Flags for CUstreamBatchMemOpParams::memoryBarrier
Values
CU_STREAM_MEMORY_BARRIER_TYPE_SYS = 0x0
System-wide memory barrier.
CU_STREAM_MEMORY_BARRIER_TYPE_GPU = 0x1
Limit memory barrier scope to the GPU.
enum CUstreamUpdateCaptureDependencies_flags
Flags for cuStreamUpdateCaptureDependencies
Values
CU_STREAM_ADD_CAPTURE_DEPENDENCIES = 0x0
Add new nodes to the dependency set
CU_STREAM_SET_CAPTURE_DEPENDENCIES = 0x1
Replace the dependency set with the new nodes
enum CUstreamWaitValue_flags
Flags for cuStreamWaitValue32 and cuStreamWaitValue64
Values
CU_STREAM_WAIT_VALUE_GEQ = 0x0
Wait until (int32_t)(*addr - value) >= 0 (or int64_t for 64 bit values). Note this is a cyclic
comparison which ignores wraparound. (Default behavior.)
CU_STREAM_WAIT_VALUE_EQ = 0x1
Wait until *addr == value.
CU_STREAM_WAIT_VALUE_AND = 0x2
Wait until (*addr & value) != 0.
CU_STREAM_WAIT_VALUE_NOR = 0x3
Wait until ~(*addr | value) != 0. Support for this operation can be queried with
cuDeviceGetAttribute() and
CU_DEVICE_ATTRIBUTE_CAN_USE_STREAM_WAIT_VALUE_NOR.
CU_STREAM_WAIT_VALUE_FLUSH = 1<<30
Follow the wait operation with a flush of outstanding remote writes. This means that, if a remote
write operation is guaranteed to have reached the device before the wait can be satisfied, that
write is guaranteed to be visible to downstream device work. The device is permitted to reorder
remote writes internally. For example, this flag would be required if two remote writes arrive in
a defined order, the wait is satisfied by the second write, and downstream work needs to observe
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the first write. Support for this operation is restricted to selected platforms and can be queried with
CU_DEVICE_ATTRIBUTE_CAN_FLUSH_REMOTE_WRITES.
enum CUstreamWriteValue_flags
Flags for cuStreamWriteValue32
Values
CU_STREAM_WRITE_VALUE_DEFAULT = 0x0
Default behavior
CU_STREAM_WRITE_VALUE_NO_MEMORY_BARRIER = 0x1
Permits the write to be reordered with writes which were issued before it, as a performance
optimization. Normally, cuStreamWriteValue32 will provide a memory fence before the write,
which has similar semantics to __threadfence_system() but is scoped to the stream rather than a
CUDA thread. This flag is not supported in the v2 API.
enum CUtensorMapDataType
Tensor map data type
Values
CU_TENSOR_MAP_DATA_TYPE_UINT8 = 0
CU_TENSOR_MAP_DATA_TYPE_UINT16
CU_TENSOR_MAP_DATA_TYPE_UINT32
CU_TENSOR_MAP_DATA_TYPE_INT32
CU_TENSOR_MAP_DATA_TYPE_UINT64
CU_TENSOR_MAP_DATA_TYPE_INT64
CU_TENSOR_MAP_DATA_TYPE_FLOAT16
CU_TENSOR_MAP_DATA_TYPE_FLOAT32
CU_TENSOR_MAP_DATA_TYPE_FLOAT64
CU_TENSOR_MAP_DATA_TYPE_BFLOAT16
CU_TENSOR_MAP_DATA_TYPE_FLOAT32_FTZ
CU_TENSOR_MAP_DATA_TYPE_TFLOAT32
CU_TENSOR_MAP_DATA_TYPE_TFLOAT32_FTZ
CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN8B
CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN16B
CU_TENSOR_MAP_DATA_TYPE_16U6_ALIGN16B
enum CUtensorMapFloatOOBfill
Tensor map out-of-bounds fill type
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Values
CU_TENSOR_MAP_FLOAT_OOB_FILL_NONE = 0
CU_TENSOR_MAP_FLOAT_OOB_FILL_NAN_REQUEST_ZERO_FMA
enum CUtensorMapIm2ColWideMode
Tensor map Im2Col wide mode
Values
CU_TENSOR_MAP_IM2COL_WIDE_MODE_W = 0
CU_TENSOR_MAP_IM2COL_WIDE_MODE_W128
enum CUtensorMapInterleave
Tensor map interleave layout type
Values
CU_TENSOR_MAP_INTERLEAVE_NONE = 0
CU_TENSOR_MAP_INTERLEAVE_16B
CU_TENSOR_MAP_INTERLEAVE_32B
enum CUtensorMapL2promotion
Tensor map L2 promotion type
Values
CU_TENSOR_MAP_L2_PROMOTION_NONE = 0
CU_TENSOR_MAP_L2_PROMOTION_L2_64B
CU_TENSOR_MAP_L2_PROMOTION_L2_128B
CU_TENSOR_MAP_L2_PROMOTION_L2_256B
enum CUtensorMapSwizzle
Tensor map swizzling mode of shared memory banks
Values
CU_TENSOR_MAP_SWIZZLE_NONE = 0
CU_TENSOR_MAP_SWIZZLE_32B
CU_TENSOR_MAP_SWIZZLE_64B
CU_TENSOR_MAP_SWIZZLE_128B
CU_TENSOR_MAP_SWIZZLE_128B_ATOM_32B
CU_TENSOR_MAP_SWIZZLE_128B_ATOM_32B_FLIP_8B
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CU_TENSOR_MAP_SWIZZLE_128B_ATOM_64B
enum CUuserObject_flags
Flags for user objects for graphs
Values
CU_USER_OBJECT_NO_DESTRUCTOR_SYNC = 1
Indicates the destructor execution is not synchronized by any CUDA handle.
enum CUuserObjectRetain_flags
Flags for retaining user object references for graphs
Values
CU_GRAPH_USER_OBJECT_MOVE = 1
Transfer references from the caller rather than creating new references.
typedef CUaccessPolicyWindow
Access policy window
typedef struct CUarray_st *CUarray
CUDA array
typedef (*CUasyncCallback) (CUasyncNotificationInfo*
info, void* userData, CUasyncCallbackHandle callback)
CUDA async notification callback
typedef struct CUasyncCallbackEntry_st
*CUasyncCallbackHandle
CUDA async notification callback handle
typedef struct CUctx_st *CUcontext
A regular context handle
typedef CUdevice
CUDA device
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typedef int CUdevice_v1
CUDA device
typedef CUdeviceptr
CUDA device pointer
typedef unsigned int CUdeviceptr_v2
CUDA device pointer CUdeviceptr is defined as an unsigned integer type whose size matches the size
of a pointer on the target platform.
typedef struct CUeglStreamConnection_st
*CUeglStreamConnection
CUDA EGLSream Connection
typedef struct CUevent_st *CUevent
CUDA event
typedef CUexecAffinityParam
Execution Affinity Parameters
typedef struct CUextMemory_st *CUexternalMemory
CUDA external memory
typedef struct CUextSemaphore_st *CUexternalSemaphore
CUDA external semaphore
typedef struct CUfunc_st *CUfunction
CUDA function
typedef struct CUgraph_st *CUgraph
CUDA graph
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typedef cuuint64_t CUgraphConditionalHandle
CUDA graph conditional handle
typedef struct CUgraphDeviceUpdatableNode_st
*CUgraphDeviceNode
CUDA graph device node handle
typedef struct CUgraphExec_st *CUgraphExec
CUDA executable graph
typedef struct CUgraphicsResource_st
*CUgraphicsResource
CUDA graphics interop resource
typedef struct CUgraphNode_st *CUgraphNode
CUDA graph node
typedef struct CUgreenCtx_st *CUgreenCtx
A green context handle. This handle can be used safely from only one CPU thread at a time. Created
via cuGreenCtxCreate
typedef void (CUDA_CB *CUhostFn) (void* userData)
CUDA host function
typedef struct CUkern_st *CUkernel
CUDA kernel
typedef struct CUlib_st *CUlibrary
CUDA library
typedef struct CUmemPoolHandle_st *CUmemoryPool
CUDA memory pool
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typedef struct CUmipmappedArray_st
*CUmipmappedArray
CUDA mipmapped array
typedef struct CUmod_st *CUmodule
CUDA module
typedef size_t (CUDA_CB *CUoccupancyB2DSize) (int
blockSize)
Block size to per-block dynamic shared memory mapping for a certain kernel
typedef struct CUstream_st *CUstream
CUDA stream
typedef void (CUDA_CB *CUstreamCallback) (CUstream
hStream, CUresult status, void* userData)
CUDA stream callback
typedef CUsurfObject
An opaque value that represents a CUDA surface object
typedef unsigned long long CUsurfObject_v1
An opaque value that represents a CUDA surface object
typedef struct CUsurfref_st *CUsurfref
CUDA surface reference
typedef CUtexObject
An opaque value that represents a CUDA texture object
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typedef unsigned long long CUtexObject_v1
An opaque value that represents a CUDA texture object
typedef struct CUtexref_st *CUtexref
CUDA texture reference
typedef struct CUuserObject_st *CUuserObject
CUDA user object for graphs
#define
CU_ARRAY_SPARSE_PROPERTIES_SINGLE_MIPTAIL
0x1
Indicates that the layered sparse CUDA array or CUDA mipmapped array has a single mip tail region
for all layers
#define CU_DEVICE_CPU ((CUdevice)-1)
Device that represents the CPU
#define CU_DEVICE_INVALID ((CUdevice)-2)
Device that represents an invalid device
#define CU_GRAPH_COND_ASSIGN_DEFAULT 0x1
Conditional node handle flags Default value is applied when graph is launched.
#define
CU_GRAPH_KERNEL_NODE_PORT_DEFAULT 0
This port activates when the kernel has finished executing.
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#define
CU_GRAPH_KERNEL_NODE_PORT_LAUNCH_ORDER
2
This port activates when all blocks of the kernel have begun execution. See also
CU_LAUNCH_ATTRIBUTE_LAUNCH_COMPLETION_EVENT.
#define
CU_GRAPH_KERNEL_NODE_PORT_PROGRAMMATIC
1
This port activates when all blocks of the kernel have performed
cudaTriggerProgrammaticLaunchCompletion() or have terminated. It must be used
with edge type CU_GRAPH_DEPENDENCY_TYPE_PROGRAMMATIC. See also
CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_EVENT.
#define CU_IPC_HANDLE_SIZE 64
CUDA IPC handle size
#define
CU_LAUNCH_KERNEL_REQUIRED_BLOCK_DIM 1
Launch with the required block dimension.
#define CU_LAUNCH_PARAM_BUFFER_POINTER
((void*)CU_LAUNCH_PARAM_BUFFER_POINTER_AS_INT)
Indicator that the next value in the extra parameter to cuLaunchKernel will be a pointer to a buffer
containing all kernel parameters used for launching kernel f. This buffer needs to honor all alignment/
padding requirements of the individual parameters. If CU_LAUNCH_PARAM_BUFFER_SIZE is not
also specified in the extra array, then CU_LAUNCH_PARAM_BUFFER_POINTER will have no
effect.
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#define
CU_LAUNCH_PARAM_BUFFER_POINTER_AS_INT
0x01
C++ compile time constant for CU_LAUNCH_PARAM_BUFFER_POINTER
#define CU_LAUNCH_PARAM_BUFFER_SIZE
((void*)CU_LAUNCH_PARAM_BUFFER_SIZE_AS_INT)
Indicator that the next value in the extra parameter to cuLaunchKernel will be a pointer to a size_t
which contains the size of the buffer specified with CU_LAUNCH_PARAM_BUFFER_POINTER. It
is required that CU_LAUNCH_PARAM_BUFFER_POINTER also be specified in the extra array if
the value associated with CU_LAUNCH_PARAM_BUFFER_SIZE is not zero.
#define
CU_LAUNCH_PARAM_BUFFER_SIZE_AS_INT 0x02
C++ compile time constant for CU_LAUNCH_PARAM_BUFFER_SIZE
#define CU_LAUNCH_PARAM_END
((void*)CU_LAUNCH_PARAM_END_AS_INT)
End of array terminator for the extra parameter to cuLaunchKernel
#define CU_LAUNCH_PARAM_END_AS_INT 0x00
C++ compile time constant for CU_LAUNCH_PARAM_END
#define
CU_MEM_CREATE_USAGE_HW_DECOMPRESS 0x2
This flag, if set, indicates that the memory will be used as a buffer for hardware accelerated
decompression.
#define CU_MEM_CREATE_USAGE_TILE_POOL 0x1
This flag if set indicates that the memory will be used as a tile pool.
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#define
CU_MEM_POOL_CREATE_USAGE_HW_DECOMPRESS
0x2
This flag, if set, indicates that the memory will be used as a buffer for hardware accelerated
decompression.
#define CU_MEMHOSTALLOC_DEVICEMAP 0x02
If set, host memory is mapped into CUDA address space and cuMemHostGetDevicePointer() may be
called on the host pointer. Flag for cuMemHostAlloc()
#define CU_MEMHOSTALLOC_PORTABLE 0x01
If set, host memory is portable between CUDA contexts. Flag for cuMemHostAlloc()
#define CU_MEMHOSTALLOC_WRITECOMBINED
0x04
If set, host memory is allocated as write-combined - fast to write, faster to DMA, slow to read except
via SSE4 streaming load instruction (MOVNTDQA). Flag for cuMemHostAlloc()
#define CU_MEMHOSTREGISTER_DEVICEMAP 0x02
If set, host memory is mapped into CUDA address space and cuMemHostGetDevicePointer() may be
called on the host pointer. Flag for cuMemHostRegister()
#define CU_MEMHOSTREGISTER_IOMEMORY 0x04
If set, the passed memory pointer is treated as pointing to some memory-mapped I/O space,
e.g. belonging to a third-party PCIe device. On Windows the flag is a no-op. On Linux that
memory is marked as non cache-coherent for the GPU and is expected to be physically
contiguous. It may return CUDA_ERROR_NOT_PERMITTED if run as an unprivileged user,
CUDA_ERROR_NOT_SUPPORTED on older Linux kernel versions. On all other platforms, it is not
supported and CUDA_ERROR_NOT_SUPPORTED is returned. Flag for cuMemHostRegister()
#define CU_MEMHOSTREGISTER_PORTABLE 0x01
If set, host memory is portable between CUDA contexts. Flag for cuMemHostRegister()
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#define CU_MEMHOSTREGISTER_READ_ONLY 0x08
If set, the passed memory pointer is treated as pointing to memory
that is considered read-only by the device. On platforms without
CU_DEVICE_ATTRIBUTE_PAGEABLE_MEMORY_ACCESS_USES_HOST_PAGE_TABLES,
this flag is required in order to register memory mapped to the CPU as read-
only. Support for the use of this flag can be queried from the device attribute
CU_DEVICE_ATTRIBUTE_READ_ONLY_HOST_REGISTER_SUPPORTED. Using this
flag with a current context associated with a device that does not have this attribute set will cause
cuMemHostRegister to error with CUDA_ERROR_NOT_SUPPORTED.
#define CU_PARAM_TR_DEFAULT -1
For texture references loaded into the module, use default texunit from texture reference.
#define CU_STREAM_LEGACY ((CUstream)0x1)
Legacy stream handle
Stream handle that can be passed as a CUstream to use an implicit stream with legacy synchronization
behavior.
See details of the synchronization behavior.
#define CU_STREAM_PER_THREAD ((CUstream)0x2)
Per-thread stream handle
Stream handle that can be passed as a CUstream to use an implicit stream with per-thread
synchronization behavior.
See details of the synchronization behavior.
#define CU_TENSOR_MAP_NUM_QWORDS 16
Size of tensor map descriptor
#define CU_TRSA_OVERRIDE_FORMAT 0x01
Override the texref format with a format inferred from the array. Flag for cuTexRefSetArray()
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#define
CU_TRSF_DISABLE_TRILINEAR_OPTIMIZATION
0x20
Disable any trilinear filtering optimizations. Flag for cuTexRefSetFlags() and cuTexObjectCreate()
#define CU_TRSF_NORMALIZED_COORDINATES
0x02
Use normalized texture coordinates in the range [0,1) instead of [0,dim). Flag for cuTexRefSetFlags()
and cuTexObjectCreate()
#define CU_TRSF_READ_AS_INTEGER 0x01
Read the texture as integers rather than promoting the values to floats in the range [0,1]. Flag for
cuTexRefSetFlags() and cuTexObjectCreate()
#define CU_TRSF_SEAMLESS_CUBEMAP 0x40
Enable seamless cube map filtering. Flag for cuTexObjectCreate()
#define CU_TRSF_SRGB 0x10
Perform sRGB->linear conversion during texture read. Flag for cuTexRefSetFlags() and
cuTexObjectCreate()
#define CUDA_ARRAY3D_2DARRAY 0x01
Deprecated, use CUDA_ARRAY3D_LAYERED
#define CUDA_ARRAY3D_COLOR_ATTACHMENT
0x20
This flag indicates that the CUDA array may be bound as a color target in an external graphics API
#define CUDA_ARRAY3D_CUBEMAP 0x04
If set, the CUDA array is a collection of six 2D arrays, representing faces of a cube. The width of such
a CUDA array must be equal to its height, and Depth must be six. If CUDA_ARRAY3D_LAYERED
flag is also set, then the CUDA array is a collection of cubemaps and Depth must be a multiple of six.
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#define CUDA_ARRAY3D_DEFERRED_MAPPING
0x80
This flag if set indicates that the CUDA array or CUDA mipmapped array will allow deferred memory
mapping
#define CUDA_ARRAY3D_DEPTH_TEXTURE 0x10
This flag if set indicates that the CUDA array is a DEPTH_TEXTURE.
#define CUDA_ARRAY3D_LAYERED 0x01
If set, the CUDA array is a collection of layers, where each layer is either a 1D or a 2D array and the
Depth member of CUDA_ARRAY3D_DESCRIPTOR specifies the number of layers, not the depth of
a 3D array.
#define CUDA_ARRAY3D_SPARSE 0x40
This flag if set indicates that the CUDA array or CUDA mipmapped array is a sparse CUDA array or
CUDA mipmapped array respectively
#define CUDA_ARRAY3D_SURFACE_LDST 0x02
This flag must be set in order to bind a surface reference to the CUDA array
#define CUDA_ARRAY3D_TEXTURE_GATHER 0x08
This flag must be set in order to perform texture gather operations on a CUDA array.
#define CUDA_ARRAY3D_VIDEO_ENCODE_DECODE
0x100
This flag indicates that the CUDA array will be used for hardware accelerated video encode/decode
operations.
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#define
CUDA_COOPERATIVE_LAUNCH_MULTI_DEVICE_NO_POST_
0x02
If set, any subsequent work pushed in a stream that participated in a call to
cuLaunchCooperativeKernelMultiDevice will only wait for the kernel launched on the GPU
corresponding to that stream to complete before it begins execution.
#define
CUDA_COOPERATIVE_LAUNCH_MULTI_DEVICE_NO_PRE_L
0x01
If set, each kernel launched as part of cuLaunchCooperativeKernelMultiDevice only waits for prior
work in the stream corresponding to that GPU to complete before the kernel begins execution.
#define CUDA_EGL_INFINITE_TIMEOUT 0xFFFFFFFF
Indicates that timeout for cuEGLStreamConsumerAcquireFrame is infinite.
#define CUDA_EXTERNAL_MEMORY_DEDICATED
0x1
Indicates that the external memory object is a dedicated resource
#define
CUDA_EXTERNAL_SEMAPHORE_SIGNAL_SKIP_NVSCIBUF_
0x01
When the flags parameter of CUDA_EXTERNAL_SEMAPHORE_SIGNAL_PARAMS contains
this flag, it indicates that signaling an external semaphore object should skip performing appropriate
memory synchronization operations over all the external memory objects that are imported as
CU_EXTERNAL_MEMORY_HANDLE_TYPE_NVSCIBUF, which otherwise are performed by
default to ensure data coherency with other importers of the same NvSciBuf memory objects.
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#define
CUDA_EXTERNAL_SEMAPHORE_WAIT_SKIP_NVSCIBUF_M
0x02
When the flags parameter of CUDA_EXTERNAL_SEMAPHORE_WAIT_PARAMS contains
this flag, it indicates that waiting on an external semaphore object should skip performing appropriate
memory synchronization operations over all the external memory objects that are imported as
CU_EXTERNAL_MEMORY_HANDLE_TYPE_NVSCIBUF, which otherwise are performed by
default to ensure data coherency with other importers of the same NvSciBuf memory objects.
#define CUDA_NVSCISYNC_ATTR_SIGNAL 0x1
When flags of cuDeviceGetNvSciSyncAttributes is set to this, it indicates that application needs
signaler specific NvSciSyncAttr to be filled by cuDeviceGetNvSciSyncAttributes.
#define CUDA_NVSCISYNC_ATTR_WAIT 0x2
When flags of cuDeviceGetNvSciSyncAttributes is set to this, it indicates that application needs
waiter specific NvSciSyncAttr to be filled by cuDeviceGetNvSciSyncAttributes.
#define CUDA_VERSION 12090
CUDA API version number
#define MAX_PLANES 3
Maximum number of planes per frame
6.2.
Error Handling
This section describes the error handling functions of the low-level CUDA driver application
programming interface.
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CUresult cuGetErrorName (CUresult error, const char
**pStr)
Gets the string representation of an error code enum name.
Parameters
error
- Error code to convert to string
pStr
- Address of the string pointer.
Returns
CUDA_SUCCESS, CUDA_ERROR_INVALID_VALUE
Description
Sets *pStr to the address of a NULL-terminated string representation of the name of the enum error
code error. If the error code is not recognized, CUDA_ERROR_INVALID_VALUE will be returned
and *pStr will be set to the NULL address.
See also:
CUresult, cudaGetErrorName
CUresult cuGetErrorString (CUresult error, const char
**pStr)
Gets the string description of an error code.
Parameters
error
- Error code to convert to string
pStr
- Address of the string pointer.
Returns
CUDA_SUCCESS, CUDA_ERROR_INVALID_VALUE
Description
Sets *pStr to the address of a NULL-terminated string description of the error code error. If the
error code is not recognized, CUDA_ERROR_INVALID_VALUE will be returned and *pStr will be
set to the NULL address.
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See also:
CUresult, cudaGetErrorString
6.3.
Initialization
This section describes the initialization functions of the low-level CUDA driver application
programming interface.
CUresult cuInit (unsigned int Flags)
Initialize the CUDA driver API Initializes the driver API and must be called before any other function
from the driver API in the current process. Currently, the Flags parameter must be 0. If cuInit() has
not been called, any function from the driver API will return CUDA_ERROR_NOT_INITIALIZED.
Parameters
Flags
- Initialization flag for CUDA.
Returns
CUDA_SUCCESS, CUDA_ERROR_INVALID_VALUE,
CUDA_ERROR_INVALID_DEVICE, CUDA_ERROR_SYSTEM_DRIVER_MISMATCH,
CUDA_ERROR_COMPAT_NOT_SUPPORTED_ON_DEVICE
Description
Note:
Note that this function may also return error codes from previous, asynchronous launches.
6.4.
Version Management
This section describes the version management functions of the low-level CUDA driver application
programming interface.
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CUresult cuDriverGetVersion (int *driverVersion)
Returns the latest CUDA version supported by driver.
Parameters
driverVersion
- Returns the CUDA driver version
Returns
CUDA_SUCCESS, CUDA_ERROR_INVALID_VALUE
Description
Returns in *driverVersion the version of CUDA supported by the driver. The version is returned
as (1000 * major + 10 * minor). For example, CUDA 9.2 would be represented by 9020.
This function automatically returns CUDA_ERROR_INVALID_VALUE if driverVersion is
NULL.
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
cudaDriverGetVersion, cudaRuntimeGetVersion
6.5.
Device Management
This section describes the device management functions of the low-level CUDA driver application
programming interface.
CUresult cuDeviceGet (CUdevice *device, int ordinal)
Returns a handle to a compute device.
Parameters
device
- Returned device handle
ordinal
- Device number to get handle for
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Returns
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED, CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_CONTEXT, CUDA_ERROR_INVALID_VALUE,
CUDA_ERROR_INVALID_DEVICE
Description
Returns in *device a device handle given an ordinal in the range [0, cuDeviceGetCount()-1].
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
cuDeviceGetAttribute, cuDeviceGetCount, cuDeviceGetName, cuDeviceGetUuid, cuDeviceGetLuid,
cuDeviceTotalMem, cuDeviceGetExecAffinitySupport
CUresult cuDeviceGetAttribute (int *pi,
CUdevice_attribute attrib, CUdevice dev)
Returns information about the device.
Parameters
pi
- Returned device attribute value
attrib
- Device attribute to query
dev
- Device handle
Returns
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED, CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_CONTEXT, CUDA_ERROR_INVALID_VALUE,
CUDA_ERROR_INVALID_DEVICE
Description
Returns in *pi the integer value of the attribute attrib on device dev. The supported attributes are:
‣ CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_BLOCK: Maximum number of threads per
block;
‣ CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_X: Maximum x-dimension of a block
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‣ CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Y: Maximum y-dimension of a block
‣ CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Z: Maximum z-dimension of a block
‣ CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_X: Maximum x-dimension of a grid
‣ CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Y: Maximum y-dimension of a grid
‣ CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Z: Maximum z-dimension of a grid
‣ CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK: Maximum amount of
shared memory available to a thread block in bytes
‣ CU_DEVICE_ATTRIBUTE_TOTAL_CONSTANT_MEMORY: Memory available on device for
__constant__ variables in a CUDA C kernel in bytes
‣ CU_DEVICE_ATTRIBUTE_WARP_SIZE: Warp size in threads
‣ CU_DEVICE_ATTRIBUTE_MAX_PITCH: Maximum pitch in bytes allowed by the memory
copy functions that involve memory regions allocated through cuMemAllocPitch()
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_WIDTH: Maximum 1D texture width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LINEAR_WIDTH: Maximum width
for a 1D texture bound to linear memory
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_MIPMAPPED_WIDTH: Maximum
mipmapped 1D texture width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_WIDTH: Maximum 2D texture width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_HEIGHT: Maximum 2D texture height
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_WIDTH: Maximum width
for a 2D texture bound to linear memory
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_HEIGHT: Maximum height
for a 2D texture bound to linear memory
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_PITCH: Maximum pitch in
bytes for a 2D texture bound to linear memory
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_MIPMAPPED_WIDTH: Maximum
mipmapped 2D texture width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_MIPMAPPED_HEIGHT: Maximum
mipmapped 2D texture height
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH: Maximum 3D texture width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT: Maximum 3D texture height
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH: Maximum 3D texture depth
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH_ALTERNATE: Alternate
maximum 3D texture width, 0 if no alternate maximum 3D texture size is supported
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT_ALTERNATE: Alternate
maximum 3D texture height, 0 if no alternate maximum 3D texture size is supported
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH_ALTERNATE: Alternate
maximum 3D texture depth, 0 if no alternate maximum 3D texture size is supported
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‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_WIDTH: Maximum cubemap
texture width or height
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_WIDTH: Maximum 1D
layered texture width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_LAYERS: Maximum
layers in a 1D layered texture
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_WIDTH: Maximum 2D
layered texture width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_HEIGHT: Maximum 2D
layered texture height
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_LAYERS: Maximum
layers in a 2D layered texture
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_LAYERED_WIDTH:
Maximum cubemap layered texture width or height
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_LAYERED_LAYERS:
Maximum layers in a cubemap layered texture
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_WIDTH: Maximum 1D surface width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_WIDTH: Maximum 2D surface width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_HEIGHT: Maximum 2D surface height
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_WIDTH: Maximum 3D surface width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_HEIGHT: Maximum 3D surface height
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_DEPTH: Maximum 3D surface depth
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_LAYERED_WIDTH: Maximum 1D
layered surface width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_LAYERED_LAYERS: Maximum
layers in a 1D layered surface
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_WIDTH: Maximum 2D
layered surface width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_HEIGHT: Maximum 2D
layered surface height
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_LAYERS: Maximum
layers in a 2D layered surface
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_WIDTH: Maximum cubemap
surface width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_LAYERED_WIDTH:
Maximum cubemap layered surface width
‣ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_LAYERED_LAYERS:
Maximum layers in a cubemap layered surface
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‣ CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK: Maximum number of 32-bit
registers available to a thread block
‣ CU_DEVICE_ATTRIBUTE_CLOCK_RATE: The typical clock frequency in kilohertz
‣ CU_DEVICE_ATTRIBUTE_TEXTURE_ALIGNMENT: Alignment requirement; texture base
addresses aligned to textureAlign bytes do not need an offset applied to texture fetches
‣ CU_DEVICE_ATTRIBUTE_TEXTURE_PITCH_ALIGNMENT: Pitch alignment requirement for
2D texture references bound to pitched memory
‣ CU_DEVICE_ATTRIBUTE_GPU_OVERLAP: 1 if the device can concurrently copy memory
between host and device while executing a kernel, or 0 if not
‣ CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT: Number of multiprocessors on the
device
‣ CU_DEVICE_ATTRIBUTE_KERNEL_EXEC_TIMEOUT: 1 if there is a run time limit for
kernels executed on the device, or 0 if not
‣ CU_DEVICE_ATTRIBUTE_INTEGRATED: 1 if the device is integrated with the memory
subsystem, or 0 if not
‣ CU_DEVICE_ATTRIBUTE_CAN_MAP_HOST_MEMORY: 1 if the device can map host
memory into the CUDA address space, or 0 if not
‣ CU_DEVICE_ATTRIBUTE_COMPUTE_MODE: Compute mode that device is currently in.
Available modes are as follows:
‣ CU_COMPUTEMODE_DEFAULT: Default mode - Device is not restricted and can have
multiple CUDA contexts present at a single time.
‣ CU_COMPUTEMODE_PROHIBITED: Compute-prohibited mode - Device is prohibited
from creating new CUDA contexts.
‣ CU_COMPUTEMODE_EXCLUSIVE_PROCESS: Compute-exclusive-process mode - Device
can have only one context used by a single process at a time.
‣ CU_DEVICE_ATTRIBUTE_CONCURRENT_KERNELS: 1 if the device supports executing
multiple kernels within the same context simultaneously, or 0 if not. It is not guaranteed that
multiple kernels will be resident on the device concurrently so this feature should not be relied
upon for correctness.
‣ CU_DEVICE_ATTRIBUTE_ECC_ENABLED: 1 if error correction is enabled on the device, 0 if
error correction is disabled or not supported by the device
‣ CU_DEVICE_ATTRIBUTE_PCI_BUS_ID: PCI bus identifier of the device
‣ CU_DEVICE_ATTRIBUTE_PCI_DEVICE_ID: PCI device (also known as slot) identifier of the
device
‣ CU_DEVICE_ATTRIBUTE_PCI_DOMAIN_ID: PCI domain identifier of the device
‣ CU_DEVICE_ATTRIBUTE_TCC_DRIVER: 1 if the device is using a TCC driver. TCC is only
available on Tesla hardware running Windows Vista or later
‣ CU_DEVICE_ATTRIBUTE_MEMORY_CLOCK_RATE: Peak memory clock frequency in
kilohertz
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‣ CU_DEVICE_ATTRIBUTE_GLOBAL_MEMORY_BUS_WIDTH: Global memory bus width in
bits
‣ CU_DEVICE_ATTRIBUTE_L2_CACHE_SIZE: Size of L2 cache in bytes. 0 if the device doesn't
have L2 cache
‣ CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_MULTIPROCESSOR: Maximum resident
threads per multiprocessor
‣ CU_DEVICE_ATTRIBUTE_UNIFIED_ADDRESSING: 1 if the device shares a unified address
space with the host, or 0 if not
‣ CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MAJOR: Major compute capability
version number
‣ CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MINOR: Minor compute capability
version number
‣ CU_DEVICE_ATTRIBUTE_GLOBAL_L1_CACHE_SUPPORTED: 1 if device supports caching
globals in L1 cache, 0 if caching globals in L1 cache is not supported by the device
‣ CU_DEVICE_ATTRIBUTE_LOCAL_L1_CACHE_SUPPORTED: 1 if device supports caching
locals in L1 cache, 0 if caching locals in L1 cache is not supported by the device
‣ CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_MULTIPROCESSOR:
Maximum amount of shared memory available to a multiprocessor in bytes; this amount is shared
by all thread blocks simultaneously resident on a multiprocessor
‣ CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR: Maximum
number of 32-bit registers available to a multiprocessor; this number is shared by all thread blocks
simultaneously resident on a multiprocessor
‣ CU_DEVICE_ATTRIBUTE_MANAGED_MEMORY: 1 if device supports allocating managed
memory on this system, 0 if allocating managed memory is not supported by the device on this
system.
‣ CU_DEVICE_ATTRIBUTE_MULTI_GPU_BOARD: 1 if device is on a multi-GPU board, 0 if
not.
‣ CU_DEVICE_ATTRIBUTE_MULTI_GPU_BOARD_GROUP_ID: Unique identifier for a group
of devices associated with the same board. Devices on the same multi-GPU board will share the
same identifier.
‣ CU_DEVICE_ATTRIBUTE_HOST_NATIVE_ATOMIC_SUPPORTED: 1 if Link between the
device and the host supports native atomic operations.
‣ CU_DEVICE_ATTRIBUTE_SINGLE_TO_DOUBLE_PRECISION_PERF_RATIO: Ratio
of single precision performance (in floating-point operations per second) to double precision
performance.
‣ CU_DEVICE_ATTRIBUTE_PAGEABLE_MEMORY_ACCESS: Device supports coherently
accessing pageable memory without calling cudaHostRegister on it.
‣ CU_DEVICE_ATTRIBUTE_CONCURRENT_MANAGED_ACCESS: Device can coherently
access managed memory concurrently with the CPU.
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‣ CU_DEVICE_ATTRIBUTE_COMPUTE_PREEMPTION_SUPPORTED: Device supports
Compute Preemption.
‣ CU_DEVICE_ATTRIBUTE_CAN_USE_HOST_POINTER_FOR_REGISTERED_MEM: Device
can access host registered memory at the same virtual address as the CPU.
‣ CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK_OPTIN: The
maximum per block shared memory size supported on this device. This is the maximum value that
can be opted into when using the cuFuncSetAttribute() or cuKernelSetAttribute() call. For more
details see CU_FUNC_ATTRIBUTE_MAX_DYNAMIC_SHARED_SIZE_BYTES
‣ CU_DEVICE_ATTRIBUTE_PAGEABLE_MEMORY_ACCESS_USES_HOST_PAGE_TABLES:
Device accesses pageable memory via the host's page tables.
‣ CU_DEVICE_ATTRIBUTE_DIRECT_MANAGED_MEM_ACCESS_FROM_HOST: The host
can directly access managed memory on the device without migration.
‣ CU_DEVICE_ATTRIBUTE_VIRTUAL_MEMORY_MANAGEMENT_SUPPORTED:
Device supports virtual memory management APIs like cuMemAddressReserve, cuMemCreate,
cuMemMap and related APIs
‣ CU_DEVICE_ATTRIBUTE_HANDLE_TYPE_POSIX_FILE_DESCRIPTOR_SUPPORTED:
Device supports exporting memory to a posix file descriptor with
cuMemExportToShareableHandle, if requested via cuMemCreate
‣ CU_DEVICE_ATTRIBUTE_HANDLE_TYPE_WIN32_HANDLE_SUPPORTED: Device
supports exporting memory to a Win32 NT handle with cuMemExportToShareableHandle, if
requested via cuMemCreate
‣ CU_DEVICE_ATTRIBUTE_HANDLE_TYPE_WIN32_KMT_HANDLE_SUPPORTED: Device
supports exporting memory to a Win32 KMT handle with cuMemExportToShareableHandle, if
requested via cuMemCreate
‣ CU_DEVICE_ATTRIBUTE_MAX_BLOCKS_PER_MULTIPROCESSOR: Maximum number of
thread blocks that can reside on a multiprocessor
‣ CU_DEVICE_ATTRIBUTE_GENERIC_COMPRESSION_SUPPORTED: Device supports
compressible memory allocation via cuMemCreate
‣ CU_DEVICE_ATTRIBUTE_MAX_PERSISTING_L2_CACHE_SIZE: Maximum L2 persisting
lines capacity setting in bytes
‣ CU_DEVICE_ATTRIBUTE_MAX_ACCESS_POLICY_WINDOW_SIZE: Maximum value of
CUaccessPolicyWindow::num_bytes
‣ CU_DEVICE_ATTRIBUTE_GPU_DIRECT_RDMA_WITH_CUDA_VMM_SUPPORTED:
Device supports specifying the GPUDirect RDMA flag with cuMemCreate.
‣ CU_DEVICE_ATTRIBUTE_RESERVED_SHARED_MEMORY_PER_BLOCK: Amount of
shared memory per block reserved by CUDA driver in bytes
‣ CU_DEVICE_ATTRIBUTE_SPARSE_CUDA_ARRAY_SUPPORTED: Device supports sparse
CUDA arrays and sparse CUDA mipmapped arrays.
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‣ CU_DEVICE_ATTRIBUTE_READ_ONLY_HOST_REGISTER_SUPPORTED: Device supports
using the cuMemHostRegister flag CU_MEMHOSTERGISTER_READ_ONLY to register
memory that must be mapped as read-only to the GPU
‣ CU_DEVICE_ATTRIBUTE_MEMORY_POOLS_SUPPORTED: Device supports using the
cuMemAllocAsync and cuMemPool family of APIs
‣ CU_DEVICE_ATTRIBUTE_GPU_DIRECT_RDMA_SUPPORTED: Device supports GPUDirect
more information)
‣ CU_DEVICE_ATTRIBUTE_GPU_DIRECT_RDMA_FLUSH_WRITES_OPTIONS: The
returned attribute shall be interpreted as a bitmask, where the individual bits are described by the
CUflushGPUDirectRDMAWritesOptions enum
‣ CU_DEVICE_ATTRIBUTE_GPU_DIRECT_RDMA_WRITES_ORDERING: GPUDirect RDMA
writes to the device do not need to be flushed for consumers within the scope indicated by the
returned attribute. See CUGPUDirectRDMAWritesOrdering for the numerical values returned
here.
‣ CU_DEVICE_ATTRIBUTE_MEMPOOL_SUPPORTED_HANDLE_TYPES: Bitmask of handle
types supported with mempool based IPC
‣ CU_DEVICE_ATTRIBUTE_DEFERRED_MAPPING_CUDA_ARRAY_SUPPORTED: Device
supports deferred mapping CUDA arrays and CUDA mipmapped arrays.
‣ CU_DEVICE_ATTRIBUTE_NUMA_CONFIG: NUMA configuration of a device: value is of type
CUdeviceNumaConfig enum
‣ CU_DEVICE_ATTRIBUTE_NUMA_ID: NUMA node ID of the GPU memory
‣ CU_DEVICE_ATTRIBUTE_MULTICAST_SUPPORTED: Device supports switch multicast and
reduction operations.
‣ CU_DEVICE_ATTRIBUTE_GPU_PCI_DEVICE_ID: The combined 16-bit PCI device ID and
16-bit PCI vendor ID.
‣ CU_DEVICE_ATTRIBUTE_GPU_PCI_SUBSYSTEM_ID: The combined 16-bit PCI subsystem
ID and 16-bit PCI subsystem vendor ID. ID.
‣ CU_DEVICE_ATTRIBUTE_HOST_NUMA_VIRTUAL_MEMORY_MANAGEMENT_SUPPORTED:
Device supports HOST_NUMA location with the virtual memory management APIs like
cuMemCreate, cuMemMap and related APIs
‣ CU_DEVICE_ATTRIBUTE_HOST_NUMA_MEMORY_POOLS_SUPPORTED: Device
supports HOST_NUMA location with the cuMemAllocAsync and cuMemPool family of APIs
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
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Modules
cuDeviceGetCount, cuDeviceGetName, cuDeviceGetUuid, cuDeviceGet, cuDeviceTotalMem,
cuDeviceGetExecAffinitySupport, cudaDeviceGetAttribute, cudaGetDeviceProperties
CUresult cuDeviceGetCount (int *count)
Returns the number of compute-capable devices.
Parameters
count
- Returned number of compute-capable devices
Returns
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED, CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_CONTEXT, CUDA_ERROR_INVALID_VALUE
Description
Returns in *count the number of devices with compute capability greater than or equal to 2.0 that are
available for execution. If there is no such device, cuDeviceGetCount() returns 0.
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
cuDeviceGetAttribute, cuDeviceGetName, cuDeviceGetUuid, cuDeviceGetLuid, cuDeviceGet,
cuDeviceTotalMem, cuDeviceGetExecAffinitySupport, cudaGetDeviceCount
CUresult cuDeviceGetDefaultMemPool (CUmemoryPool
*pool_out, CUdevice dev)
Returns the default mempool of a device.
Returns
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_VALUE, CUDA_ERROR_INVALID_DEVICE,
CUDA_ERROR_NOT_SUPPORTED
Description
The default mempool of a device contains device memory from that device.
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Modules
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
cuMemAllocAsync, cuMemPoolTrimTo, cuMemPoolGetAttribute, cuMemPoolSetAttribute,
cuMemPoolSetAccess, cuDeviceGetMemPool, cuMemPoolCreate
CUresult cuDeviceGetExecAffinitySupport (int *pi,
CUexecAffinityType type, CUdevice dev)
Returns information about the execution affinity support of the device.
Parameters
pi
- 1 if the execution affinity type type is supported by the device, or 0 if not
type
- Execution affinity type to query
dev
- Device handle
Returns
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED, CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_CONTEXT, CUDA_ERROR_INVALID_VALUE,
CUDA_ERROR_INVALID_DEVICE
Description
Returns in *pi whether execution affinity type type is supported by device dev. The supported types
are:
‣ CU_EXEC_AFFINITY_TYPE_SM_COUNT: 1 if context with limited SMs is supported by the
device, or 0 if not;
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
cuDeviceGetAttribute, cuDeviceGetCount, cuDeviceGetName, cuDeviceGetUuid, cuDeviceGet,
cuDeviceTotalMem
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Modules
CUresult cuDeviceGetLuid (char *luid, unsigned int
*deviceNodeMask, CUdevice dev)
Return an LUID and device node mask for the device.
Parameters
luid
- Returned LUID
deviceNodeMask
- Returned device node mask
dev
- Device to get identifier string for
Returns
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED, CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_VALUE, CUDA_ERROR_INVALID_DEVICE
Description
Return identifying information (luid and deviceNodeMask) to allow matching device with
graphics APIs.
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
cuDeviceGetAttribute, cuDeviceGetCount, cuDeviceGetName, cuDeviceGet, cuDeviceTotalMem,
cuDeviceGetExecAffinitySupport, cudaGetDeviceProperties
CUresult cuDeviceGetMemPool (CUmemoryPool *pool,
CUdevice dev)
Gets the current mempool for a device.
Returns
CUDA_SUCCESS, CUDA_ERROR_INVALID_VALUE
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Modules
Description
Returns the last pool provided to cuDeviceSetMemPool for this device or the device's default memory
pool if cuDeviceSetMemPool has never been called. By default the current mempool is the default
mempool for a device. Otherwise the returned pool must have been set with cuDeviceSetMemPool.
See also:
cuDeviceGetDefaultMemPool, cuMemPoolCreate, cuDeviceSetMemPool
CUresult cuDeviceGetName (char *name, int len,
CUdevice dev)
Returns an identifier string for the device.
Parameters
name
- Returned identifier string for the device
len
- Maximum length of string to store in name
dev
- Device to get identifier string for
Returns
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED, CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_CONTEXT, CUDA_ERROR_INVALID_VALUE,
CUDA_ERROR_INVALID_DEVICE
Description
Returns an ASCII string identifying the device dev in the NULL-terminated string pointed to by
name. len specifies the maximum length of the string that may be returned. name is shortened to the
specified len, if len is less than the device name
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
cuDeviceGetAttribute, cuDeviceGetUuid, cuDeviceGetLuid, cuDeviceGetCount, cuDeviceGet,
cuDeviceTotalMem, cuDeviceGetExecAffinitySupport, cudaGetDeviceProperties
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Modules
CUresult cuDeviceGetNvSciSyncAttributes (void
*nvSciSyncAttrList, CUdevice dev, int flags)
Return NvSciSync attributes that this device can support.
Parameters
nvSciSyncAttrList
- Return NvSciSync attributes supported.
dev
- Valid Cuda Device to get NvSciSync attributes for.
flags
- flags describing NvSciSync usage.
Description
Returns in nvSciSyncAttrList, the properties of NvSciSync that this CUDA device, dev
can support. The returned nvSciSyncAttrList can be used to create an NvSciSync object that
matches this device's capabilities.
If NvSciSyncAttrKey_RequiredPerm field in nvSciSyncAttrList is already set this API will
return CUDA_ERROR_INVALID_VALUE.
The applications should set nvSciSyncAttrList to a valid NvSciSyncAttrList failing which this
API will return CUDA_ERROR_INVALID_HANDLE.
The flags controls how applications intends to use the NvSciSync created from the
nvSciSyncAttrList. The valid flags are:
‣ CUDA_NVSCISYNC_ATTR_SIGNAL, specifies that the applications intends to signal an
NvSciSync on this CUDA device.
‣ CUDA_NVSCISYNC_ATTR_WAIT, specifies that the applications intends to wait on an
NvSciSync on this CUDA device.
At least one of these flags must be set, failing which the API returns
CUDA_ERROR_INVALID_VALUE. Both the flags are orthogonal to one another: a developer
may set both these flags that allows to set both wait and signal specific attributes in the same
nvSciSyncAttrList.
Note that this API updates the input nvSciSyncAttrList with values equivalent to the following
public attribute key-values: NvSciSyncAttrKey_RequiredPerm is set to
‣ NvSciSyncAccessPerm_SignalOnly if CUDA_NVSCISYNC_ATTR_SIGNAL is set in flags.
‣ NvSciSyncAccessPerm_WaitOnly if CUDA_NVSCISYNC_ATTR_WAIT is set in flags.
‣ NvSciSyncAccessPerm_WaitSignal if both CUDA_NVSCISYNC_ATTR_WAIT and
CUDA_NVSCISYNC_ATTR_SIGNAL are set in flags. NvSciSyncAttrKey_PrimitiveInfo is set
to
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Modules
‣ NvSciSyncAttrValPrimitiveType_SysmemSemaphore on any valid device.
‣ NvSciSyncAttrValPrimitiveType_Syncpoint if device is a Tegra device.
‣ NvSciSyncAttrValPrimitiveType_SysmemSemaphorePayload64b if device is GA10X+.
NvSciSyncAttrKey_GpuId is set to the same UUID that is returned for this device from
cuDeviceGetUuid.
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED, CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_VALUE, CUDA_ERROR_INVALID_HANDLE,
CUDA_ERROR_INVALID_DEVICE, CUDA_ERROR_NOT_SUPPORTED,
CUDA_ERROR_OUT_OF_MEMORY
See also:
cuImportExternalSemaphore, cuDestroyExternalSemaphore, cuSignalExternalSemaphoresAsync,
cuWaitExternalSemaphoresAsync
CUresult cuDeviceGetTexture1DLinearMaxWidth (size_t
*maxWidthInElements, CUarray_format format, unsigned
numChannels, CUdevice dev)
Returns the maximum number of elements allocatable in a 1D linear texture for a given texture element
size.
Parameters
maxWidthInElements
- Returned maximum number of texture elements allocatable for given format and
numChannels.
format
- Texture format.
numChannels
- Number of channels per texture element.
dev
- Device handle.
Returns
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED, CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_CONTEXT, CUDA_ERROR_INVALID_VALUE,
CUDA_ERROR_INVALID_DEVICE
Description
Returns in maxWidthInElements the maximum number of texture elements allocatable in a 1D
linear texture for given format and numChannels.
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Modules
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
cuDeviceGetAttribute, cuDeviceGetCount, cuDeviceGetName, cuDeviceGetUuid, cuDeviceGet,
cudaMemGetInfo, cuDeviceTotalMem
CUresult cuDeviceGetUuid (CUuuid *uuid, CUdevice dev)
Return an UUID for the device.
Parameters
uuid
- Returned UUID
dev
- Device to get identifier string for
Returns
CUDA_SUCCESS, CUDA_ERROR_DEINITIALIZED, CUDA_ERROR_NOT_INITIALIZED,
CUDA_ERROR_INVALID_VALUE, CUDA_ERROR_INVALID_DEVICE
Description
Note there is a later version of this API, cuDeviceGetUuid_v2. It will supplant this version in 12.0,
which is retained for minor version compatibility.
Returns 16-octets identifying the device dev in the structure pointed by the uuid.
Note:
Note that this function may also return error codes from previous, asynchronous launches.
See also:
cuDeviceGetUuid_v2 cuDeviceGetAttribute, cuDeviceGetCount, cuDeviceGetName,
cuDeviceGetLuid, cuDeviceGet, cuDeviceTotalMem, cuDeviceGetExecAffinitySupport,
cudaGetDeviceProperties
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